X25F008 Memory Datasheet

X25F008 Datasheet, PDF, Equivalent


Part Number

X25F008

Description

SerialFlash Memory

Manufacture

Xicor

Total Page 16 Pages
Datasheet
Download X25F008 Datasheet


X25F008
APPLICATION NOTE
A V A I LABLE
AN61 • AN75 • AN77 • AN79 • AN82
X25F064/032/016/008
SerialFlash™ Memory With Block LockTM Protection
FEATURES
• 1MHz Clock Rate
• SPI Serial Interface
• 64K/32K/16K/8K Bits
— 32 Byte Small Sector Program Mode
• Low Power CMOS
— <1µA Standby Current
— <5mA Active Current
• 1.8V – 3.6V or 5V “Univolt” Read and
Program Power Supply Versions
• Block Lock Protection
— Protect 1/4, 1/2, or all of E2PROM Array
• Built-in Inadvertent Program Protection
— Power-Up/Power-Down protection circuitry
— Program Enable Latch
— Program Protect Pin
• Self-Timed Program Cycle
— 5ms Program Cycle Time (Typical)
• High Reliability
— Endurance: 100,000 cycles per byte
— Data Retention: 100 Years
— ESD protection: 2000V on all pins
• 8-Lead PDlP Package
• 8-Lead 150 mil SOIC Packages
• 32K, 16K, 8K available in 14-Lead TSSOP,
64K available in 20-Lead TSSOP
DESCRIPTION
The X25F064/032/016/008 family are 8/16/32/64K-bit
CMOS SerialFlash memory, internally organized
X 8. They feature a “Univolt” Program and Read voltage,
Serial Peripheral Interface (SPI), and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK), plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25F064/032/016/008 also features two additional
inputs that provide the end user with added flexibility. By
asserting the HOLD input, the X25F064/032/016/008
will ignore transitions on its inputs, thus allowing the host
to service higher priority interrupts. The PP input can be
used as a hardwire input to the X25F064/032/016/008
disabling all program attempts to the status register,
thus providing a mechanism for limiting end user capa-
bility of altering 0, 1/4, 1/2, or all of the memory.
The X25F064/032/016/008 utilizes Xicor’s proprietary
flash cell, providing a minimum endurance
of 100,000 cycles and a minimum data retention of
100 years.
FUNCTIONAL DIAGRAM
SI
SO
SCK
COMMAND
DECODE
AND CONTROL
LOGIC
X
DECODE
LOGIC
DATA REGISTER
SECTOR DECODE LOGIC
32 8
MEMORY
ARRAY
CS
HOLD
STATUS
REGISTER
PP
PROGRAMMING
CONTROL LOGIC
SerialFlash™ and Block Lock™ Protection are trademarks of Xicor, Inc.
© Xicor, Inc. 1995, 1996 Patents Pending
6685-3.1 8/29/96 T3/C0/D0 SH
HIGH VOLTAGE
CONTROL
6685 ILL F01.4
Characteristics subject to change without notice

X25F008
X25F064/032/016/008
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push-pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte
addresses, and data to be written to the memory are
input on this pin. Data is latched by the rising edge of the
serial clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the rising edge of the clock
input, while data on the SO pin change after the falling
edge of the clock input.
Chip Select (CS)
When CS is HIGH, the X25F064/032/016/008 is
deselected and the SO output pin is at high impedance
and unless an internal program operation is underway
the X25F064/032/016/008 will be in the standby power
mode. CS LOW enables the X25F064/032/016/008,
placing it in the active power mode. It should be noted
that after power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Program Protect (PP)
When PP is LOW and the nonvolatile bit PPEN is “1”,
nonvolatile programming of the X25F064/032/016/008
status register is disabled, but the part otherwise func-
tions normally. When PP is held HIGH, all functions,
including nonvolatile programming operate normally.
PP going LOW while CS is still LOW will interrupt
programming of the X25F064/032/016/008 status regis-
ter. If the internal program cycle has already been
initiated, PP going LOW will have no effect on program-
ming.
The PP pin function is blocked when the PPEN bit in
the status register is “0”. This allows the user to install the
X25F064/032/016/008 into a system with PP pin
grounded and still be able to program the status register.
The PP pin functions will be enabled when the PPEN bit
is set “0”.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence
is underway, HOLD may be used to pause the serial
communication with the controller without resetting the
serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH
at all times.
PIN CONFIGURATION
CS
SO
PP
VSS
8-Lead DIP/SOIC
18
2 X25F064/ 7
3
032/016/
008
6
45
VCC
HOLD
SCK
SI
CS
SO
NC
NC
NC
PP
VSS
14-Lead TSSOP
1 14
2 13
3 12
X25F032/
4 016/008 11
5 10
69
78
VCC
HOLD
NC
NC
NC
SCK
SI
NC
CS
NC
SO
NC
NC
PP
VSS
NC
NC
20-Lead TSSOP
1 20
2 19
3 18
4 17
5 X25F064 16
6 15
7 14
8 13
9 12
10 11
NC
VCC
NC
HOLD
NC
NC
SCK
SI
NC
NC
6685 ILL F02.4
PIN NAMES
SYMBOL
CS
SO
SI
SCK
PP
VSS
VCC
HOLD
NC
DESCRIPTION
Chip Select Input
Serial Output
Serial Input
Serial Clock Input
Program Protect Input
Ground
Supply Voltage
Hold Input
No Connect
6685 PGM T01.1
2


Features APPLICATION NOTE A V A I LABLE AN61 • AN75 • AN77 • AN79 • AN82 X25F06 4/032/016/008 SerialFlash™ Memory Wi th Block LockTM Protection FEATURES 1MHz Clock Rate • SPI Serial Interf ace • 64K/32K/16K/8K Bits — 32 Byte Small Sector Program Mode • Low Powe r CMOS — <1µA Standby Current — <5 mA Active Current • 1.8V – 3.6V or 5V “Univolt” Read and Program Power Supply Versions • Block Lock Protect ion — Protect 1/4, 1/2, or all of E2P ROM Array • Built-in Inadvertent Prog ram Protection — Power-Up/Power-Down protection circuitry — Program Enable Latch — Program Protect Pin • Self -Timed Program Cycle — 5ms Program Cy cle Time (Typical) • High Reliability — Endurance: 100,000 cycles per byte — Data Retention: 100 Years — ESD protection: 2000V on all pins • 8-Lea d PDlP Package • 8-Lead 150 mil SOIC Packages • 32K, 16K, 8K available in 14-Lead TSSOP, 64K available in 20-Lead TSSOP DESCRIPTION The X25F064/032/016/008 family are 8/16/32/.
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