Alterable E2PROM. X28C64 Datasheet

X28C64 Datasheet PDF, Equivalent


Part Number

X28C64

Description

8K x 8-Bit Alterable E2PROM

Manufacture

Xicor

Total Page 25 Pages
PDF Download
Download X28C64 Datasheet PDF


X28C64 Datasheet
X28C64
64K
X28C64
8K x 8 Bit
5 Volt, Byte Alterable E2PROM
FEATURES
150ns Access Time
Simple Byte and Page Write
—Single 5V Supply
—No External High Voltages or VPP Control
Circuits
—Self-Timed
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Low Power CMOS
—60mA Active Current Max.
—200µA Standby Current Max.
Fast Write Cycle Times
—64 Byte Page Write Operation
—Byte or Page Write Cycle: 5ms Typical
—Complete Memory Rewrite: 0.625 sec. Typical
—Effective Byte Write Cycle Time: 78µs Typical
Software Data Protection
End of Write Detection
DATA Polling
—Toggle Bit
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
JEDEC Approved Byte-Wide Pinout
PIN CONFIGURATION
DESCRIPTION
The X28C64 is an 8K x 8 E2PROM, fabricated with
Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C64 is a 5V only device. The
X28C64 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard RAMs.
The X28C64 supports a 64-byte page write operation,
effectively providing a 78µs/byte write cycle and en-
abling the entire memory to be typically written in 0.625
seconds. The X28C64 also features DATA and Toggle
Bit Polling, a system software support scheme used to
indicate the early completion of a write cycle. In addi-
tion, the X28C64 includes a user-optional software data
protection mode that further enhances Xicor’s hard-
ware write protect capability.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
PLASTIC DIP
CERDIP
FLAT PACK
SOIC
1 28
2 27
3 26
4 25
5 24
6 23
7 22
X28C64
8 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
WE
NC
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
3853 FHD F02
LCC
PLCC
4 3 2 1 32 31 30
5 29
6 28
7 27
8 26
9
X28C64
25
10 24
11 23
12 22
13 21
14 15 16 17 18 19 20
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
3853 FHD F03
A2
A1
A0
I/O0
I/O1
I/O2
NC
VSS
NC
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSOP
X28C64
32 A3
31 A4
30 A5
29 A6
28 A7
27 A12
26 NC
25 NC
24 VCC
23 NC
22 WE
21 NC
20 A8
19 A9
18 A11
17 OE
3853 ILL F23.1
© Xicor, Inc. 1991, 1995 Patents Pending
3853-2.7 4/2/96 T0/C3/D2 NS
1 Characteristics subject to change without notice

X28C64 Datasheet
X28C64
PIN DESCRIPTIONS
Addresses (A0–A12)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read operations.
PIN NAMES
Symbol
A0–A12
I/O0–I/O7
WE
CE
OE
VCC
VSS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
3853 PGM T01
FUNCTIONAL DIAGRAM
Data In/Data Out (I/O0–I/O7)
Data is written to or read from the X28C64 through the
I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to the
X28C64.
PIN CONFIGURATION
PGA
I/O1 I/O2 I/O3 I/O5 I/O6
12 13 15 17 18
I/O0 A0
VSS I/O4 I/O7
11 10 14 16 19
A1 A2
98
CE A10
20 21
X28C64
A3 A4
OE A11
76
22 23
A5 A12 VCC A9 A8
5 2 28 24 25
A6 A7 NC WE NC
4 3 1 27 26
BOTTOM VIEW
3853 FHD F04
A0–A12
ADDRESS
INPUTS
X BUFFERS
LATCHES AND
DECODER
Y BUFFERS
LATCHES AND
DECODER
65,536-BIT
E2PROM
ARRAY
I/O BUFFERS
AND LATCHES
CE
OE
WE
VCC
VSS
CONTROL
LOGIC AND
TIMING
I/O0–I/O7
DATA INPUTS/OUTPUTS
3853 FHD F01
2


Features Datasheet pdf X28C64 64K X28C64 8K x 8 Bit 5 Volt, Byte Alterable E2PROM FEATURES • 15 0ns Access Time • Simple Byte and Pag e Write —Single 5V Supply —No Exter nal High Voltages or VPP Control Circui ts —Self-Timed —No Erase Before Wri te —No Complex Programming Algorithms —No Overerase Problem • Low Power CMOS —60mA Active Current Max. —200 µA Standby Current Max. • Fast Write Cycle Times —64 Byte Page Write Oper ation —Byte or Page Write Cycle: 5ms Typical —Complete Memory Rewrite: 0.6 25 sec. Typical —Effective Byte Write Cycle Time: 78µs Typical • Software Data Protection • End of Write Detec tion —DATA Polling —Toggle Bit • High Reliability —Endurance: 100,000 Cycles —Data Retention: 100 Years • JEDEC Approved Byte-Wide Pinout PIN CO NFIGURATION DESCRIPTION The X28C64 is an 8K x 8 E2PROM, fabricated with Xicor ’s proprietary, high performance, flo ating gate CMOS technology. Like all Xi cor programmable nonvolatile memories the X28C64 is a 5V only d.
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