Dynamic RAM. VG26V17400E Datasheet

VG26V17400E RAM. Datasheet pdf. Equivalent

VG26V17400E Datasheet
Recommendation VG26V17400E Datasheet
Part VG26V17400E
Description CMOS Dynamic RAM
Feature VG26V17400E; VIS Description VG26(V)(S)17400E 4,194,304 x 4 - Bit CMOS Dynamic RAM The device is CMOS Dynamic R.
Manufacture Vanguard International Semiconductor
Datasheet
Download VG26V17400E Datasheet




Vanguard International Semiconductor VG26V17400E
VIS
Description
VG26(V)(S)17400E
4,194,304 x 4 - Bit
CMOS Dynamic RAM
The device is CMOS Dynamic RAM organized as 4,194,304 words x 4 bits. It is fabricated
with an advanced submicron CMOS technology and designed to operate from a single 5V only
or 3.3V only power supply. Low voltage operation is more suitable to be used on battery
backup, portable electronic application. A new refresh feature called “ self-refresh “ is supported
and very slow CBR cycles are being performed. It is packaged in JEDEC standard 26/24 - pin
plastic SOJ or TSOP (II).
Features
• Single 5V (±10 %) or 3.3V (±10 %) only power supply
• High speed tRAC access time : 50/60 ns
• Low power dissipation
- Active mode : 5V version 605/550 mW (Max.)
3.3V version 396/360 mW (Max.)
- Standby mode : 5V version 1.375 mW (Max.)
3.3V version 0.54 mW (Max.)
• Fast Page Mode access
• I/O level : TTL compatible (Vcc = 5V)
LVTTL compatible (Vcc = 3.3V)
• 2048 refresh cycles in 32 ms (Std) or 128ms (S - version)
• 4 refresh mode :
- RAS only refresh
- CAS-before-RAS refresh
- Hidden refresh
- Self - refresh (S - version)
Document : 1G5-0142
Rev.1
Page 1



Vanguard International Semiconductor VG26V17400E
VIS
Pin configuration
26/24 - PIN 300mil Plastic SOJ
VCC
DQ1
DQ2
WE
RAS
NC
1
2
3
4
5
6
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
21 A9
A10
A0
A1
A2
A3
VCC
8
9
10
11
12
13
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
VG26(V)(S)17400E
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Pin Description
Pin Name
Function
A0 - A10
Address inputs
- Row address
- Column address
- Refresh address
A0 - A10
A0 - A10
A0 - A10
DQ1 ~ DQ4 Data - in/data - out
RAS
Row address strobe
CAS
Column address strobe
WE Write enable
OE Output enable
Vcc Power (+ 5V or + 3.3V)
Vss Ground
Document : 1G5-0142
Rev.1
Page 2



Vanguard International Semiconductor VG26V17400E
VIS
Block Diagram
WE
CAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
RAS
NO. 2 CLOCK
GENERATOR
COLUMN-
ADDRESS
BUFFERS (11)
REFRESH
CONTROLLER
REFRESH
COUNTER
ROW
ADDRESS
BUFFERS (11)
NO. 1 CLOCK
GENERATOR
VG26(V)(S)17400E
4,194,304 x 4 - Bit
CMOS Dynamic RAM
CONTROL
LOGIC
DATA - IN BUFFER
COLUMN
DECODER
2048
SENSE AMPLIFIERS
I/O GATING
2048 x 4
DATA - OUT
BUFFER
2048 x 2048 x 4
MEMORY
ARRAY
DQ1
DQ4
Vcc
Vss
Document : 1G5-0142
Rev.1
Page 3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)