Monolithic FLASH. ACT-F128K8 Datasheet

ACT-F128K8 FLASH. Datasheet pdf. Equivalent

Part ACT-F128K8
Description High Speed 1 Megabit Monolithic FLASH
Feature ACT–F128K8 High Speed 1 Megabit Monolithic FLASH Features CIRCUIT TECHNOLOGY www.aeroflex.com s L.
Manufacture Aeroflex
Datasheet
Download ACT-F128K8 Datasheet

ACT–F128K8 High Speed 1 Megabit Monolithic FLASH Features ACT-F128K8 Datasheet
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ACT-F128K8
ACT–F128K8 High Speed
1 Megabit Monolithic FLASH
Features
CIRCUIT TECHNOLOGY
www.aeroflex.com
s Low Power Monolithic 128K x 8 FLASH
s Industry Standard Pinouts
s TTL Compatible Inputs and CMOS Outputs s Packaging – Hermetic Ceramic
s Access Times of 60, 70, 90, 120 and 150ns
s +5V Programing, +5V Supply
s 100,000 Erase / Program Cycles
s Low Standby Current
q 32 Lead, 1.6" x .6" x .20" Dual-in-line Package (DIP),
Aeroflex code# "P4"
q 32 Lead, .82" x .41" x .125" Ceramic Flat Package
(FP), Aeroflex code# "F6"
q 32 Lead, .82" x .41" x .132" Ceramic Flat Package
(FP Lead Formed), Aeroflex code# "F7"
s Page Program Operation and Internal
Program Control Time
s Supports Full Chip Erase
s Sector Architecture
q 8 Equal size sectors of 16K bytes each
q Any Combination of Sectors can be erased with one
command sequence.
s Embedded Erase and Program Algorithms s Commercial, Industrial and Military
s Supports Full Chip Erase
Temperature Ranges
s
MIL-PRF-38534 Compliant Circuits Available
s
DESC SMD Pending
5962-96690 (P4,F6,F7)
Block Diagram – DIP (P4) & Flat Packages (F6,F7)
WE
OE
A0 – A16
CE
Vss
512Kx8
Vcc
8
I/O0-7
Pin Description
I/O0-7
Data I/O
A0–16 Address Inputs
WE Write Enable
CE Chip Enable
OE Output Enable
VCC Power Supply
VSS Ground
NC Not Connected
General Description
The ACT–F128K8 is a high
speed, 1 megabit CMOS
monolithic Flash module
designed for full temperature
range military, space, or high
reliability applications.
This device is input TTL and
output CMOS compatible. The
command register is written by
bringing write enable (WE) and
chip enable (CE) to a logic low
level and output enable (OE) to a
logic high level. Reading is
accomplished when WE is high
and CE, OE are both low, see
Figure 9. Access time grades of
60ns, 70ns, 90ns, 120ns and
150ns maximum are standard.
The ACT–F128K8 is
available in a choice of
eroflex Circuit Technology - Advanced Multichip Modules © SCD1676 REV A 5/6/98



ACT-F128K8
General Description, Cont’d,
hermetically sealed ceramic packages; a
32 lead .82" x .41" x .125" flat package in
both formed or unformed leads or a 32 pin
1.6"x.60" x.20" DIP package for operation
over the temperature range -55°C to
+125°C and military environmental
conditions.
The flash memory is organized as
128Kx8 bits and is designed to be
programmed in-system with the standard
system 5.0V Vcc supply. A 12.0V VPP is
not required for write or erase operations.
The device can also be reprogrammed with
standard EPROM programmers (with the
proper socket).
The standard ACT–F128K8 offers
access times between 60ns and 150ns,
allowing operation of high-speed
microprocessors without wait states. To
eliminate bus contention, the device has
separate chip enable (CE), write enable
(WE) and output enable (OE) controls. The
ACT–F128K8 is command set compatible
with JEDEC standard 1 Mbit EEPROMs.
Commands are written to the command
register using standard microprocessor
write timings. Register contents serve as
input to an internal state-machine which
controls the erase and programming
circuitry. Write cycles also internally latch
addresses and data needed for the
programming and erase operations.
Reading data out of the device is similar
to reading from 12.0V Flash or EPROM
devices. The ACT–F128K8 is programmed
by executing the program command
sequence. This will invoke the Embedded
Program Algorithm which is an internal
algorithm that automatically times the
program pulse widths and verifies proper
cell margin. Typically, each sector can be
programmed and verified in less than 0.3
second. Erase is accomplished by
executing the erase command sequence.
This will invoke the Embedded Erase
Algorithm which is an internal algorithm
that automatically preprograms the array, (if
it is not already programmed before)
executing the erase operation. During
erase, the device automatically times the
erase pulse widths and verifies proper cell
margin.
Also the device features a sector erase
architecture. The sector mode allows for
16K byte blocks of memory to be erased
and reprogrammed without affecting other
blocks. The ACT-F128K8 is erased when
shipped from the factory.
The device features single 5.0V power
supply operation for both read and write
functions. lnternally generated and
regulated voltages are provided for the
program and erase operations. A low VCC
detector automatically inhibits write
operations on the loss of power. The end of
program or erase is detected by Data
Polling of D7 or by the Toggle Bit feature on
D6. Once the end of a program or erase
cycle has been completed, the device
internally resets to the read mode.
All bits of each die, or all bits within a
sector of a die, are erased via
Fowler-Nordhiem tunneling. Bytes are
programmed one byte at a time by hot
electron injection.
A DESC Standard Military Drawing
(SMD) number is pending.
Aeroflex Circuit Technology
2 SCD1676 REV A 5/6/98 Plainview NY (516) 694-6700





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