N-Channel MOSFET. ME6972 Datasheet

ME6972 MOSFET. Datasheet pdf. Equivalent

Part ME6972
Description Dual N-Channel MOSFET
Feature Dual N-Channel 20-V (D-S) MOSFET GENERAL DESCRIPTION The ME6972 Dual N-Channel logic enhancement mod.
Manufacture Matsuki
Datasheet
Download ME6972 Datasheet

Dual N-Channel 20-V (D-S) MOSFET GENERAL DESCRIPTION The ME6 ME6972 Datasheet
Dual N-Channel 20-V (D-S) MOSFET GENERAL DESCRIPTION The ME6 ME6972-G Datasheet
Recommendation Recommendation Datasheet ME6972 Datasheet




ME6972
Dual N-Channel 20-V (D-S) MOSFET
GENERAL DESCRIPTION
The ME6972 Dual N-Channel logic enhancement mode power field
effect transistors are produced using high cell density, DMOS trench
technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching, and low in-line power loss are needed in a
very small outline surface mount package.
ME6972/ME6972-G
FEATURES
RDS(ON)26m@VGS=4.5V
RDS(ON)36m@VGS=2.5V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
Load Switch
DSC
PIN CONFIGURATION
(TSSOP-8)
Top View
e Ordering Information: ME6972 (Pb-free)
ME6972-G (Green product-Halogen free)
Absolute Maximum Ratings (TA=25Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
TA=25
Current(TJ=150)
TA=70
Pulsed Drain Current
Maximum Power Dissipation
TA=25
TA=70
Operating Junction Temperature
Thermal Resistance-Junction to Ambient*
Symbol
VDSS
VGSS
ID
IDM
PD
TJ
RθJA
* The device mounted on 1in2 FR4 board with 2 oz copper
Maximum
20
±12
5.5
4.4
22
1.3
0.8
-55 to 150
100
Unit
V
V
A
A
W
℃/W
DCC
正式發行
May, 2010-Ver1.0
01



ME6972
Dual N-Channel 20-V (D-S) MOSFET
ME6972/ME6972-G
Electrical Characteristics (TA =25Unless Otherwise Specified)
Symbol Parameter
Limit
Min
STATIC
BVDSS
VGS(th)
Drain-Source Breakdown Voltage
Gate Threshold Voltage
VGS=0V, ID=250μA
VDS=VGS, ID=250μA
20
0.4
IGSS Gate Leakage Current
VDS=0V, VGS=±12V
IDSS
Zero Gate Voltage Drain Current
VDS=20V, VGS=0V
RDS(ON)
Drain-Source On-State Resistance a
VGS=4.5V, ID= 6.0A
VGS=2.5V, ID= 5.2A
VSD Diode Forward Voltage
IS=1.7A, VGS=0V
DYNAMIC
Qg Total Gate Charge
Qgs Gate-Source Charge
VDS=10V, VGS=4.5V, ID=6.0A
Qgd Gate-Drain Charge
Ciss Input Capacitance
Coss
Output Capacitance
VDS=15V, VGS=0V,f=1MHz
Crss
td(on)
tr
td(off)
tf
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
VDD=10V, RL =10Ω
ID=1A, VGEN=4.5V
RG=6Ω
Typ
20
28
0.7
8
2.1
2.3
530
73
23
14
17
43
5
Max Unit
0.9
±100
1
26
36
1.2
V
V
nA
μA
mΩ
V
pF
ns
Notes: a. pulse test: pulse width300us, duty cycle2%, Guaranteed by design, not subject to production testing.
b. Matsuki reserves the right to improve product design, functions and reliability without notice.
May, 2010-Ver1.0
DCC
正式發行
02





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