Flash Microcontrollers. PIC24FJ64GB204 Datasheet

PIC24FJ64GB204 Microcontrollers. Datasheet pdf. Equivalent

PIC24FJ64GB204 Datasheet
Recommendation PIC24FJ64GB204 Datasheet
Part PIC24FJ64GB204
Description 16-Bit Flash Microcontrollers
Feature PIC24FJ64GB204; PIC24FJ128GB204 FAMILY 28/44-Pin, General Purpose, 16-Bit Flash Microcontrollers with Cryptographic .
Manufacture Microchip
Datasheet
Download PIC24FJ64GB204 Datasheet




Microchip PIC24FJ64GB204
PIC24FJ128GB204 FAMILY
28/44-Pin, General Purpose, 16-Bit Flash Microcontrollers with
Cryptographic Engine, ISO 7816, USB On-The-Go and XLP Technology
Cryptographic Engine
• AES Engine with 128,192 or 256-Bit Key
• Supports ECB, CBC, OFB, CTR and CFB128 modes
• DES/Triple DES (TDES) Engine: Supports
2-Key and 3-Key EDE or DED TDES
• Supports up to Three Unique Keys for TDES
• Programmatically Secure
• True Random Number Generator
• Pseudorandom Number Generator
• Non-Readable, On-Chip, OTP Key Storages
Universal Serial Bus Features
• USB v2.0 On-The-Go (OTG) Compliant
• Dual Role Capable; can Act as Either Host or
Peripheral
• Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s)
USB Operation in Host mode
• Full-Speed USB Operation in Device mode
• High-Precision PLL for USB
• USB Device mode Operation from FRC Oscillator:
- No crystal oscillator required
• Supports up to 32 Endpoints (16 bidirectional):
- USB module can use any RAM locations on
the device as USB endpoint buffers
• On-Chip USB Transceiver
• Supports Control, Interrupt, Isochronous and
Bulk Transfers
• On-Chip Pull-up and Pull-Down Resistors
Memory
Analog
Peripherals
Extreme Low-Power Features
• Multiple Power Management Options for Extreme
Power Reduction:
- VBAT allows the device to transition to a
backup battery for the lowest power
consumption with RTCC
- Deep Sleep allows near total power-down,
with the ability to wake-up on internal or
external triggers
- Sleep and Idle modes selectively shut down
peripherals and/or core for substantial power
reduction and fast wake-up
- Doze mode allows CPU to run at a lower
clock speed than peripherals
• Alternate Clock modes allow On-the-Fly
Switching to a Lower Clock Speed for Selective
Power Reduction
• Extreme Low-Power Current Consumption for
Deep Sleep:
- WDT: 270 nA @ 3.3V typical
- RTCC: 400 nA @ 32 kHz, 3.3V typical
- Deep Sleep current: 40 nA, 3.3V typical
Digital Peripherals
Device
PIC24FJ128GB204 128K 8K 44 12 3 12 6 6 2 3 4 Y 5 Y Y Y
PIC24FJ128GB202 128K 8K 28 9 3 9 6 6 2 3 4 N 5 Y Y Y
PIC24FJ64GB204 64K 8K 44 12 3 12 6 6 2 3 4 Y 5 Y Y Y
PIC24FJ64GB202 64K 8K 28 9 3 9 6 6 2 3 4 N 5 Y Y Y
2013-2015 Microchip Technology Inc.
DS30005009C-page 1



Microchip PIC24FJ64GB204
PIC24FJ128GB204 FAMILY
Analog Features
• 10/12-Bit, 12-Channel Analog-to-Digital (A/D)
Converter:
- Conversion rate of 500 ksps (10-bit),
200 ksps (12-bit)
- Conversion available during Sleep and Idle
• Three Rail-to-Rail, Enhanced Analog Comparators
with Programmable Input/Output Configuration
• Three On-Chip Programmable Voltage References
• Charge Time Measurement Unit (CTMU):
- Used for capacitive touch sensing, up to 12 channels
- Time measurement down to 100 ps resolution
- Operation in Sleep mode
Peripheral Features
• Up to Five External Interrupt Sources
• Peripheral Pin Select (PPS); Allows Independent
I/O Mapping of many Peripherals
• Five 16-Bit Timers/Counters with Prescaler:
- Can be paired as 32-bit timers/counters
• Six-Channel DMA supports All Peripheral modules:
- Minimizes CPU overhead and increases data
throughput
• Six Input Capture modules, each with a Dedicated
16-Bit Timer
• Six Output Compare/PWM modules, each with a
Dedicated 16-Bit Timer
• Enhanced Parallel Master/Slave Port (EPMP/EPSP)
• Hardware Real-Time Clock/Calendar (RTCC):
- Runs in Sleep, Deep Sleep and VBAT modes
• Three 3-Wire/4-Wire SPI modules:
- Support four Frame modes
- Variable FIFO buffer
- I2S mode
- Variable width from 2-bit to 32-bit
• Two I2C™ modules Support Multi-Master/
Slave mode and 7-Bit/10-Bit Addressing
• Four UART modules:
- Support RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA®
- Smart Card ISO 7816 support on UART1 and
UART2 only:
- T = 0 protocol with automatic error handling
- T = 1 protocol
- Dedicated Guard Time Counter (GTC)
- Dedicated Waiting Time Counter (WTC)
- Auto-wake-up on Auto-Baud Detect (ABD)
- 4-level deep FIFO buffer
• Programmable 32-Bit Cyclic Redundancy Check
(CRC) Generator
• Digital Signal Modulator provides On-Chip FSK
and PSK Modulation for a Digital Signal Stream
• High-Current Sink/Source (18 mA/18 mA) on
All I/O Pins
• Configurable Open-Drain Outputs on Digital I/O Pins
• 5.5V Tolerant Inputs on Most Pins
DS30005009C-page 2
High-Performance CPU
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator:
- 96 MHz PLL option
- Multiple clock divide options
- Run-time self-calibration capability for
maintaining better than ±0.20% accuracy
- Fast start-up
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set
Architecture (ISA)
• Two Address Generation Units (AGUs) for
Separate Read and Write Addressing of
Data Memory
Special Microcontroller Features
• Supply Voltage Range of 2.0V to 3.6V
• Two On-Chip Voltage Regulators (1.8V and 1.2V)
for Regular and Extreme Low-Power Operation
• 20,000 Erase/Write Cycle Endurance Flash
Program Memory, Typical
• Flash Data Retention: 20 Years Minimum
• Self-Programmable under Software Control
• Programmable Reference Clock Output
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Emulation (ICE) via 2 Pins
• JTAG Programming and Boundary Scan Support
• Fail-Safe Clock Monitor (FSCM) Operation:
- Detects clock failure and switches to on-chip,
Low-Power RC Oscillator
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Separate Brown-out Reset (BOR) and Deep
Sleep Brown-out Reset (DSBOR) Circuits
• Programmable High/Low-Voltage Detect (HLVD)
• Flexible Watchdog Timer (WDT) with its Own
RC Oscillator for Reliable Operation
• Standard and Ultra Low-Power Watchdog Timers
(ULPW) for Reliable Operation in Standard and
Deep Sleep modes
2013-2015 Microchip Technology Inc.



Microchip PIC24FJ64GB204
Pin Diagrams
28-Pin SPDIP,
SOIC, SSOP(1)
PIC24FJ128GB204 FAMILY
MCLR
PGD3/CVREF+/VREF+/AN0/C3INC/RP5/ASDA1/CTED1/CN2/RA0
PGC3/CVREF-/VREF-/AN1/C3IND/RP6/ASCL1/CTED2/CN3/RA1
PGD1/AN2/CTCMP/HLVDIN/C2INB/RP0/CN4/RB0
PGC1/AN3/C2INA/RP1/CTED12/CN5/RB1
AN4/C1INB/RP2/SDA2/T5CK/T4CK/CTED13/CN6/RB2
AN5/C1INA/RP3/SCL2/CTED8/CN7/RB3
VSS
OSCI/CLKI/C1IND/CN30/RA2
OSCO/CLKO/C2IND/CN29/RA3
SOSCI/RPI4/CN1/RB4
SOSCO/SCLKI/CN0/RA4
VDD
TMS/USBID/CN27/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VDD
27 VSS
26 AN9/C3INA/RP15/T3CK/T2CK/CTED6/CN11/RB15
25 CVREF/AN6/C3INB/RP14/RTCC/CTED5/CN12/RB14
24 AN7/C1INC/REFO/RP13/CTPLS/CN13/RB13
23 VUSB3V3
22 PGC2/REFI/RP11/D-/CTED9/CN15/RB11
21 PGD2/RP10/D+/CTED11/CN16/RB10
20 VCAP/VDDCORE
19 VBAT
18 TDO/C1INC/C2INC/C3INC/RP9/SDA1/T1CK/CTED4/CN21/RB9
17 TCK/RP8/SCL1/USBOEN/CTED10/CN22/RB8
16 TDI/RP7/CTED3/INT0/CN23/RB7
15 VBUS/RP6/CN24/RB6
Legend: RPn represents remappable peripheral pins.
Note 1: Gray shading indicates 5.5V tolerant input pins.
2013-2015 Microchip Technology Inc.
DS30005009C-page 3





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