D/A Converter. ES7148 Datasheet

ES7148 Converter. Datasheet pdf. Equivalent

ES7148 Datasheet
Recommendation ES7148 Datasheet
Part ES7148
Description 24-Bit Stereo D/A Converter
Feature ES7148; ES7148 12-pin, 24-Bit Stereo D/A Converter for PCM Audio GENERAL DESCRIPTION FEATURES The ES7148.
Manufacture Everest Semiconductor
Datasheet
Download ES7148 Datasheet




Everest Semiconductor ES7148
ES7148
12-pin, 24-Bit Stereo D/A Converter for PCM Audio
GENERAL DESCRIPTION
FEATURES
The ES7148 is a low cost 12-pin stereo
digital to analog converter. The ES7148
can accept I²S serial audio data format
up to 24-bit word length. The device
uses advanced multi-bit -∑ modulation
technique to convert data into two
channel analog outputs. The multi-bit
-modulator makes the device with
very low sensitivity to clock jitter and
very low out of band noise.
100 dB SNR
-85 dB THD+N
Up to 100 kHz sampling frequency
Support USB clocks or non standard
audio clocks like 25 MHz or 26 MHz
I2S audio data format, 16-24 bits
Single power supply 3V to 3.6V
APPLICATIONS
Digital Photo Frame
Set top box
Digital TV
DVD player
Audio player
ORDERING INFORMATION
ES7148 -40°C ~ +85°C QFN-12
BLOCK DIAGRAM
SDATA
SCLK
LRCK
Audio
Data
Interface
Clock Manager/
Sample Rate
Detector
Interpolation
Filter
Interpolation
Filter
Multi-level
Sigma-delta
DAC
Multi-level
Sigma-delta
DAC
Output Amp
Low Pass
Filter
Output Amp
Low Pass
Filter
CLKIN
AOUTLN
AOUTRN
Rev 4.0
1 August, 2017



Everest Semiconductor ES7148
Everest Semiconductor
1. PIN DESCRIPTIONS
SCLK
LRCK
CLKIN
1
2
3
ES7148
9 VDD
8 GND
7 NC
ES7148
PIN PIN
I/O DESCRIPTION
1 SCLK
I Bit clock input
2 LRCK
I Left and right channel clock input indicating input data sampling
rate (Fs) and channel selection
3 CLKIN
I System clock input
4 CAP1
O Filtering capacitor
5 CAP2
O Filtering capacitor
6 AOUTLN O Analog output of left channel
7 NC
I No connect
8 GND
I Ground
9 VDD
I Device power supply
10 AOUTRN O Analog output of right channel
11 NC
I No connect
12 SDATA
I Serial audio data input
2. RECOMMENDED APPLICATION CIRCUIT
GND
0.1u F
+3 V3
1R
10 uF GND
GND
10 K
GND
22 00p F
SDIN
BCLK
LRCK
MCLK
12
33 R
1
33 R
2
33 R
3
33 R
SDATA ES7148 NC
SCLK
AOUTRN
LRCK
AOUTLN
CLKIN
NC
11
10 3.3u F
6 3.3u F
7
47 0R
47 0R
10 K
22 00p F
AOUTRN
AOUTLN
GND
10 uF
GND
10 uF
GND
GND
For best performance,decoupling and filter capacitor should be located as close to the device package as possible
Rev 4.0
Figure 1 Recommended Application Circuit
2
August, 2017



Everest Semiconductor ES7148
Everest Semiconductor
ES7148
3. APPLICATION DESCRIPTIONS
Sampling Rate and Input Clocks
According to the sampling rate, the device can work in two speed modes, single
speed and double speed. Table 1 lists the typical clock modes supported by the
device. The device supports USB clocks or non standard audio clocks like 25 MHz or
26 MHz.
Table 1 Speed Mode and CLKIN/LRCK Ratio
MODE
Sampling Rate
CLKIN/LRCK Ratio
Single Speed
8kHz – 50kHz
32, 64, 128, 192, 256, 384, 512, 768, 1024
Double Speed 84kHz – 100kHz
128, 192, 256, 384, 512, 768, 1024
Audio Data Input
The ES7148 can accept I²S serial audio input data from 16-bit to 24-bit. The device
can detect the data word length automatically. The relationship of SDATA, SCLK and
LRCK for the format is illustrated through Figures 2.
SDATA
SCLK
LRCK
1 SCLK
12
MSB
3
n-2 n-1 n
LSB
LEFT CHANNEL
1 SCLK
12
MSB
3
n-2 n-1 n
LSB
RIGHT CHANNEL
Figure 2 I²S serial audio data format up to 24-bit
Power Up and Power Down
Upon applying VDD, the device will reset itself and enter power down state. During
this state, the device clamps outputs to ground and power down the device operation
except for clock management unit. Once proper CLKIN and LRCK clocks are applied,
the device will leave power down state, and the device outputs ramp from ground to
common mode voltage softly. Then the device enters the normal operation.
Rev 4.0
3 August, 2017





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