Timekeeper Chip. HT1381A Datasheet

HT1381A Chip. Datasheet pdf. Equivalent

HT1381A Datasheet
Recommendation HT1381A Datasheet
Part HT1381A
Description Serial Timekeeper Chip
Feature HT1381A; HT1380A/HT1381A Serial Timekeeper Chip Features • Operating voltage: 2.0V~5.5V • Maximum input se.
Manufacture Holtek Semiconductor
Datasheet
Download HT1381A Datasheet




Holtek Semiconductor HT1381A
HT1380A/HT1381A
Serial Timekeeper Chip
Features
• Operating voltage: 2.0V~5.5V
• Maximum input serial clock: 500kHz at VDD=2V,
2MHz at VDD=5V
• Operating current:
– less than 0.5μA at 2V
– less than 0.7μA at 3V
– less than 1.0μA at 5V
• TTL compatible
– VIH: 2.0V~VDD+0.3V at VDD=5V
– VIL: 0.3V~+0.8V at VDD=5V
• Two data transmission modes: single-byte, or burst
mode
• Serial I/O transmission
• All registers store BCD format
• HT1380A: 8-pin DIP package
HT1381A: 8-pin SOP package
Applications
• Microcomputer serial clock
• Clock and Calendar
General Description
The HT1380A/HT1381A is a serial timekeeper IC
which provides seconds, minutes, hours, day, date,
month and year information. The number of days in
each month and leap years are automatically adjusted.
The HT1380A/HT1381A is designed for low power
consumption and can operate in two modes: one is the
12-hour mode with an AM/PM indicator, the other is
the 24-hour mode.
The HT1380A/HT1381A has several registers to
store the corresponding information with 8-bit data
format. A 32768Hz crystal is required to provide the
correct timing. In order to minimize the pin number,
the HT1380A/HT1381A use a serial I/O transmission
method to interface with a microprocessor. Only three
wires are required: (1) REST, (2) SCLK and (3) I/O.
Data can be delivered 1 byte at a time or in a burst of
up to 8 bytes.
Block Diagram
I/O
S C LK
REST
D a ta S h ift
R e g is te r
C Co no tm r o m l La on gd i c
R e a l T im e
C lo c k
O s c illa to r a n d
D iv id e r C ir c u it
X1
X2
Pin Assignment
NC
X1
X2
VSS
18
27
36
45
H T1380A
8 D IP -A
VDD
S C LK
I/O
REST
NC 1
X1 2
X2 3
VSS 4
8 VDD
7 S C LK
6 I/O
5 REST
H T1381A
8 S O P -A
Rev. 1.10
1 February 03, 2015



Holtek Semiconductor HT1381A
HT1380A/HT1381A
Pad Assignment
NC 1
NC 2
NC 3
VSS 4
X1 5
X2 6
VSS 7
(0 ,0 )
11 V D D
10 S C LK
9 I/O
8 REST
Chip size: 1136 × 900 (μm)2
* The IC substrate should be connected to VSS in the PCB layout artwork.
Pad Coordinates
Pad No.
1
2
3
4
5
6
7
8
9
10
11
X
-456.985
-456.985
-456.985
-455.590
-466.000
-466.000
-466.000
465.966
465.966
465.966
465.966
Y
333.025
264.025
195.025
109.935
-154.955
-249.955
-344.955
-309.630
-214.630
-119.630
-24.630
Unit: μm
Pad Description
Pin Name
I/O
VSS
X1 I
X2 O
REST
I
I/O I/O
SCLK
I
VDD
Internal Connection
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Description
Negative power supply, ground
32768Hz crystal input pad
Oscillator output pad
Reset pin with serial transmission
Data Input/Output pin with serial transmission
Serial Clock pulse pin with serial transmission
Positive power supply
Rev. 1.10
2 February 03, 2015



Holtek Semiconductor HT1381A
HT1380A/HT1381A
Absolute Maximum Ratings
Supply Voltage ........................................ -0.3V ~ 5.5V
Input Voltage.............................. VSS-0.3V ~ VDD+0.3V
Storage Temperature .............................-50˚C ~ 125˚C
Operating Temperature............................-40˚C ~ 85˚C
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings”
may cause substantial damage to the device. Functional operation of this device at other conditions beyond
those listed in the specification is not implied and prolonged exposure to extreme conditions may affect
device reliability.
D.C. Characteristics
Symbol
Parameter
ISTB Standby Current
IDD Operating Current
IOH Source Current
IOL Sink Current
VIH "H" Input Voltage
VIL "L" Input Voltage
Test Conditions
VDD Conditions
2V
3V —
5V
2V
3V No load
5V
2V VOH=1.8V
3V VOH=2.7V
5V VOH=4.5V
2V VOL=0.2V
3V VOL=0.3V
5V VOL=0.5V
3V
5V
3V
5V
Min.
-0.20
-0.35
-0.50
0.70
1.20
2.00
2.00
2.00
Typ.
0.30
0.50
0.85
-0.40
-0.70
-1.00
1.50
2.50
4.00
Max.
100
100
100
0.50
0.70
1.00
0.60
0.80
Ta=25˚C
Unit
nA
μA
mA
mA
V
V
Note: ISTB is specified with SCLK, I/O, REST open. The clock halt bit must be set to logic 1 (oscillator disabled).
Rev. 1.10
3 February 03, 2015







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