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Buffer IC. PL133-37 Datasheet

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Buffer IC. PL133-37 Datasheet






PL133-37 IC. Datasheet pdf. Equivalent




PL133-37 IC. Datasheet pdf. Equivalent





Part

PL133-37

Description

1:3 Fanout Buffer IC



Feature


PL133-37 Low-Power, 1.62V to 3.63V, 1MH z to 150MHz, 1:3 Fanout Buffer IC FEAT URES • 3 LVCMOS Outputs • 12mA Outp ut Drive Strength • Input/Output Freq uency: o Reference Clock: 1MHz to 150MH z • Supports LVCMOS or Sine Wave Inpu t Clock • Very Low Jitter and Phase N oise • Low Current Consumption • Si ngle 1.8V, 2.5V, or 3.3V, ±10% Power S upply • Operating Temperature Ran.
Manufacture

Micrel

Datasheet
Download PL133-37 Datasheet


Micrel PL133-37

PL133-37; ge o 0°C to 70°C (Commercial) o -40°C to 85°C (Industrial) • Available in SOT23-6L GREEN/RoHS Compliant Packages DESCRIPTION The PL133-37 is an advanc ed fanout buffer design for high perfor mance, low-power, small form-factor app lications. The PL133-37 accepts a refer ence clock input of 1MHz to 150MHz and produces three outputs of the same freq uency. Reference clock i.


Micrel PL133-37

nputs may be LVCMOS or sine-wave signals (the inputs are internally AC-coupled) . Offered in a small 3mm x 3mm SOT23, t he PL133-37 offers the best phase noise and jitter performance and lowest powe r consumption of any comparable IC. PA CK .


Micrel PL133-37

.

Part

PL133-37

Description

1:3 Fanout Buffer IC



Feature


PL133-37 Low-Power, 1.62V to 3.63V, 1MH z to 150MHz, 1:3 Fanout Buffer IC FEAT URES • 3 LVCMOS Outputs • 12mA Outp ut Drive Strength • Input/Output Freq uency: o Reference Clock: 1MHz to 150MH z • Supports LVCMOS or Sine Wave Inpu t Clock • Very Low Jitter and Phase N oise • Low Current Consumption • Si ngle 1.8V, 2.5V, or 3.3V, ±10% Power S upply • Operating Temperature Ran.
Manufacture

Micrel

Datasheet
Download PL133-37 Datasheet




 PL133-37
PL133-37
Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC
FEATURES
3 LVCMOS Outputs
12mA Output Drive Strength
Input/Output Frequency:
o Reference Clock: 1MHz to 150MHz
Supports LVCMOS or Sine Wave Input Clock
Very Low Jitter and Phase Noise
Low Current Consumption
Single 1.8V, 2.5V, or 3.3V, ±10% Power Supply
Operating Temperature Range
o 0°C to 70°C (Commercial)
o -40°C to 85°C (Industrial)
Available in SOT23-6L GREEN/RoHS Compliant
Packages
DESCRIPTION
The PL133-37 is an advanced fanout buffer design
for high performance, low-power, small form-factor
applications. The PL133-37 accepts a reference
clock input of 1MHz to 150MHz and produces three
outputs of the same frequency. Reference clock in-
puts may be LVCMOS or sine-wave signals (the in-
puts are internally AC-coupled). Offered in a small
3mm x 3mm SOT23, the PL133-37 offers the best
phase noise and jitter performance and lowest power
consumption of any comparable IC.
PACKAGE PIN CONFIGURATION
CLK1 1 6 CLK2
GND 2 5 VDD
FIN 3 4 CLK0
SOT23-6L
BLOCK DIAGRAM
CLK0
FIN CLK1
CLK2
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 02/24/15 Page 1




 PL133-37
PL133-37
Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC
PIN DESCRIPTION
Name
Package Pin #
SOT23-6L
Type
Description
CLK1 1 O Output clock
GND 2 P Ground connection
FIN 3 I Reference clock input
CLK0 4 O Output clock
VDD 5 P Power supply
CLK2 6 O Output clock
LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
Signal Integrity and Termination Considerations
- Keep traces short!
- Trace = Inductor. With a capacitive load this equals
ringing!
- Long trace = Transmission Line. Without proper termi-
nation this will cause reflections (looks like ringing).
- Design long traces as “striplines” or “microstrips” with
defined impedance.
- Match trace at one side to avoid reflections bouncing
back and forth.
Decoupling and Power Supply Considerations
- Place decoupling capacitors as close as possible to
the VDD pin(s) to limit noise from the power supply
- Multiple VDD pins should be decoupled separately
for best performance.
- Addition of a ferrite bead in series with VDD can
help prevent noise from other board sources
- Value of decoupling capacitor is frequency de-
pendant. Typical value to use is 0.1µF.
Typical CMOS termination
Place Series Resistor as close as possible to CMOS output
CMOS Output Buffer
(Typical buffer impedance 20Ω)
50Ω line
To CMOS Input
Series Resistor
Use value to match output buffer impedance to
50Ω trace. Typical value 30Ω
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 02/24/15 Page 2




 PL133-37
PL133-37
Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage Range
VDD -0.5
4.6 V
Input Voltage Range
VI
-0.5
VDD+0.5
V
Output Voltage Range
VO
-0.5
VDD+0.5
V
Storage Temperature
TS -65
150 °C
Ambient Operating Temperature*
-40 85 °C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent
damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the
device at these or any other conditions above the operational limits noted in this specification is not implied.
*Operating temperature is guaranteed by design. Parts are tested to commercial grade only.
AC SPECIFICATIONS
PARAMETERS
CONDITIONS
MIN. TYP. MAX. UNITS
Input (FIN) Frequency
Input (FIN)
Signal Amplitude
Output Enable Time
Output Rise Time
Output Fall Time
Duty Cycle
Output to Output Skew
2.5V and 3.3V operation
1 150 MHz
1.8V operation
1 100 MHz
Internally AC coupled, <150MHz,
VDD=2.5V and 3.3V.
0.8
VDD VPP
Internally AC coupled, <100MHz, all VDDs
Internally AC coupled, 3.3V <50MHz,
2.5V <40MHz, 1.8V <15MHz
0.5
0.1
VDD VPP
VDD VPP
OE Function; Ta=25º C, 15pF Load
10 ns
15pF Load, 10/90%VDD, 3.3V
2 3 ns
15pF Load, 90/10%VDD, 3.3V
2 3 ns
Input Duty Cycle is 50%
45 50 55 %
All outputs equally loaded
250 ps
DC SPECIFICATIONS
PARAMETERS
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Supply Current, Dynamic
Supply Current, Standby
Operating Voltage
Output Low Voltage
Output High Voltage
Output Current
VDD = 3.3V, 25MHz, No Load
1.2 mA
IDD VDD = 2.5V, 25MHz, No Load
0.9 mA
VDD = 1.8V, 25MHz, No Load
0.6 mA
IDD_SB OE Pin Pulled Low, VDD = 3.3V
0.3
mA
VDD 1.62 3.63 V
VOL IOL = +12mA, VDD = 3.3V
0.4 V
VOH IOH = -12mA, VDD = 3.3V
2.4
V
IOSD
VOL = 0.4V, VOH = 2.4V,
VDD = 3.3V
12
mA
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 02/24/15 Page 3



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