2.5GHz Any-In to LVPECL Programmable Clock Divider/Fanout Buffer
Description
SY89874AU
2.5GHz, Any-In to LVPECL, Programmable Clock Divider/Fanout Buffer with Internal
Termination
General Description
This low-skew, low-jitter device can accept a high-speed (622MHz or higher) LVTTL, LVCMOS, CML, LVPECL, LVDS or HSTL clock input signal and divide down the frequency using a programmable divider ratio to create a frequency-locked, lower...
