Linear Regulator. NCV59748 Datasheet

NCV59748 Regulator. Datasheet pdf. Equivalent

Part NCV59748
Description Dual-Rail Very Low-Dropout Linear Regulator
Feature NCV59748 1.5 A, Dual-Rail Very Low‐Dropout Linear Regulator with Programmable Soft‐Start The NCV597.
Manufacture ON Semiconductor
Datasheet
Download NCV59748 Datasheet

NCV59748 1.5 A, Dual-Rail Very Low‐Dropout Linear Regulator NCV59748 Datasheet
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NCV59748
NCV59748
1.5 A, Dual-Rail Very
Low‐Dropout Linear
Regulator with
Programmable Soft‐Start
The NCV59748 is dual−rail very low dropout voltage regulator,
capable of providing an output current in excess of 1.5 A with a
dropout voltage of 60 mV typ. at full load current. The devices are
stable with ceramic and any other type of output capacitor 2.2 mF.
This series contains adjustable output voltage version with output
voltage down to 0.8 V. Internal protection features consist of built-in
thermal shutdown and output current limiting protection.
User-programmable Soft-Start and Power-Good pins are available.
The NCV59748 is offered in DFN10 3×3 package, wettable flank
options available for Enhanced Optical Inspection.
Features
Output Current in Excess of 1.5 A
VIN Range: 0.8 V to 5.5 V
VBIAS Range: 2.7 V to 5.5 V
Output Voltage Range: 0.8 V to 3.6 V
Dropout Voltage: 60 mV at 1.5 A
Programmable Soft-Start
Open Drain Power Good Output
Fast Transient Response
Stable with Any Type of Output Capacitor 2.2 mF
Current Limit and Thermal Shutdown Protection
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Applications
Automotive, Consumer and Industrial Equipment Point of Load
Regulation
FPGA, DSP and Logic Power Supplies
Switching Power Supply Post Regulation
NCV59748
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DFN10
CASE 485C
1
DFNW10
CASE 507AE
MARKING DIAGRAM
1
NCV
59748
ALYWG
G
1
NCVL
59748
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
IN 1
IN 2
PG 3
BIAS 4
EN 5
Thermal
Pad
10 OUT
9 OUT
8 FB
7 SS
6 GND
DFN10/DFNW10 3y3
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2017
February, 2017 − Rev. 1
1
Publication Order Number:
NCV59748/D



NCV59748
NCV59748
Figure 2. Simplified Schematic Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Name DFN10/DFNW10
Description
IN 1, 2 Unregulated input to the device.
EN 5 Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode. This pin must not be left floating.
SS 7 Soft-Start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left
floating, the regulator output soft-start ramp time is typically 200 ms.
BIAS
4 Bias input voltage for error amplifier, reference, and internal control circuits.
PG 3 Power-Good (PG) is an open-drain, active-high output that indicates the status of VOUT. When VOUT
exceeds the PG trip threshold, the PG pin goes into a high-impedance state. When VOUT is below this
threshold the pin is driven to a low-impedance state. A pull-up resistor from 10 kW to 1 MW should be
connected from this pin to a supply up to 5.5 V. The supply can be higher than the input voltage.
Alternatively, the PG pin can be left floating if output monitoring is not necessary.
FB 8 This pin is the feedback connection to the center tap of an external resistor divider network that sets the
output voltage. This pin must not be left floating.
OUT
9, 10
Regulated output voltage. A small capacitor (total typical capacitance 2.2 mF, ceramic) is needed from
this pin to ground to assure stability.
GND
6 Ground
PAD/TAB
Should be soldered to the ground plane for increased thermal performance.
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