On-The-Go controller. ISP1362 Datasheet

ISP1362 controller. Datasheet pdf. Equivalent

Part ISP1362
Description Single-chip Universal Serial Bus On-The-Go controller
Feature ISP1362 Single-chip Universal Serial Bus On-The-Go controller Rev. 04 — 24 December 2004 Product .
Manufacture Philips
Datasheet
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ISP1362 Single-chip Universal Serial Bus On-The-Go controll ISP1362 Datasheet
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ISP1362
ISP1362
Single-chip Universal Serial Bus On-The-Go controller
Rev. 04 — 24 December 2004
Product data
1. General description
The ISP1362 is a single-chip Universal Serial Bus (USB) On-The-Go (OTG) controller
integrated with the advanced Philips Slave Host Controller (PSHC) and the Philips
ISP1181B Device Controller (DC). The USB OTG controller is compliant with
On-The-Go Supplement to the USB 2.0 Specification Rev. 1.0a. The host and device
controllers are compliant with Universal Serial Bus Specification Rev. 2.0, supporting
data transfer at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s).
The ISP1362 has two USB ports: port 1 and port 2. Port 1 can be hardware
configured to function as a downstream port, an upstream port or an OTG port
whereas port 2 can only be used as a downstream port. The OTG port can switch
roles from host to peripheral, or from peripheral to host. The OTG port can become a
host through the Host Negotiation Protocol (HNP) as specified in the OTG
supplement.
A USB product with OTG capability can function either as a host or as a peripheral.
For instance, with this dual-role capability, a Personal Computer (PC) peripheral such
as a printer may switch roles from a peripheral to a host for connecting to a digital
camera so that the printer can print pictures taken by the camera without using a PC.
When a USB product with OTG capability is inactive, the USB interface is turned off.
This feature has made OTG a technology well-suited for use in portable
devices—such as, Personal Digital Assistant (PDA), Digital Still Camera (DSC) and
mobile phone—in which power consumption is a concern. The ISP1362 is an OTG
controller designed to perform such functions.
2. Features
s Complies fully with:
x Universal Serial Bus Specification Rev. 2.0
x On-The-Go Supplement to the USB 2.0 Specification Rev. 1.0a
s Supports data transfer at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s)
s Adapted from Open Host Controller Interface Specification for USB Release 1.0a
s USB OTG:
x Supports Host Negotiation Protocol (HNP) and Session Request Protocol
(SRP) for OTG dual-role devices
x Provides status and control signals for software implementation of HNP and
SRP
x Provides programmable timers required for HNP and SRP
x Supports built-in and external source of VBUS
x Output current of the built-in charge pump is adjustable by using an external
capacitor



ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
s USB host:
x Supports integrated physical 4096 bytes of multiconfiguration memory
x Supports all four types of USB transfers: control, bulk, interrupt and
isochronous
x Supports multiframe buffering for isochronous transfer
x Supports automatic interrupt polling rate mechanism
x Supports paired buffering for bulk transfer
x Directly addressable memory architecture; memory can be updated on-the-fly
s USB device:
x Supports high performance USB interface device with integrated Serial
Interface Engine (SIE), buffer memory and transceiver
x Supports fully autonomous and multiconfiguration DMA operation
x Supports up to 14 programmable USB endpoints with 2 fixed control IN/OUT
endpoints
x Supports integrated physical 2462 bytes of multiconfiguration memory
x Supports endpoints with double buffering to increase throughput and ease
real-time data transfer
x Supports controllable LazyClock (110 kHz ± 50 %) output during ‘suspend’
s Supports two USB ports: port 1 and port 2
x Port 1 can be configured to function as a downstream port, an upstream port
or an OTG port
x Port 2 can be used only as a downstream port
s Supports software-controlled connection to the USB bus (SoftConnect™)
s Supports good USB connection indicator that blinks with traffic (GoodLink™)
s Complies with USB power management requirements
s Supports internal power-on and low-voltage reset circuit, with possibility of a
software reset
s Supports operation over the extended USB voltage range (4.0 V to 5.5 V) with
5 V tolerant I/O pads
s High-speed parallel interface to most CPUs available in the market, such as
Hitachi SH-3, Intel® StrongARM®, Philips XA, Fujitsu SPARClite®, NEC and
Toshiba MIPS, ARM7/9, Motorola DragonBall™ and PowerPC™ Reduced
Instruction Set Computer (RISC):
x 16-bit data bus
x 10 Mbyte/s data transfer rate between the microprocessor and ISP1362
s Supports Programmed I/O (PIO) or Direct Memory Access (DMA)
s Supports ‘suspend’ and remote wake-up
s Uses 12 MHz crystal or direct clock source with on-chip Phase-Locked Loop
(PLL) for low Electro-Magnetic Interference (EMI)
s Operates at 3.3 V power supply
s Operating temperature range from 40 °C to +85 °C
s Available in 64-pin LQFP and TFBGA packages.
9397 750 13957
Product data
Rev. 04 — 24 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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