Echo Cancellor. ZL50233 Datasheet

ZL50233 Cancellor. Datasheet pdf. Equivalent

Part ZL50233
Description 4 Channel Voice Echo Cancellor
Feature ZL50233 4 Channel Voice Echo Cancellor Data Sheet Features • Independent multiple channels of echo.
Manufacture Zarlink Semiconductor
Datasheet
Download ZL50233 Datasheet

ZL50233 4 Channel Voice Echo Cancellor Data Sheet Features ZL50233 Datasheet
Recommendation Recommendation Datasheet ZL50233 Datasheet




ZL50233
ZL50233
4 Channel Voice Echo Cancellor
Data Sheet
Features
• Independent multiple channels of echo
cancellation; from 4 channels of 64 ms to 2
channels of 128 ms with the ability to mix
channels at 128 ms or 64 ms in any combination
• Independent Power Down mode for each group of
2 channels for power management
• Fully compliant to ITU-T G.165, G.168 (2000) and
(2002) specifications
• Passed AT&T voice quality testing for carrier
grade echo cancellers.
• Compatible to ST-BUS and GCI interfaces with
2 Mbps serial PCM data
• PCM coding, µ/A-Law ITU-T G.711 or sign
magnitude
• Per channel Fax/Modem G.164 2100 Hz or G.165
2100 Hz phase reversal Tone Disable
• Per channel echo canceller parameters control
• Transparent data transfer and mute
• Fast reconvergence on echo path changes
• Fully programmable convergence speeds
• Patented Advanced Non-Linear Processor with
high quality subjective performance
• Protection against narrow band signal divergence
and instability in high echo environments
VDD1 (3.3 V)
VSS
March 2006
ZL50233/QCC
ZL50233/GDG
ZL50233QCG1
Ordering Information
100 Pin LQFP
208 Ball LBGA
100 Pin LQFP*
Trays
Trays, Bake & Drypack
Trays, Bake & Drypack
*Pb Free Matte Tin
-40°C to +85°C
• +9 dB to -12 dB level adjusters (3 dB steps) at all
signal ports
• Offset nulling of all PCM channels
• 10 MHz or 20 MHz master clock operation
• 3.3 V I/O pads and 1.8 V Logic core operation with
5 V tolerant inputs
• IEEE-1149.1 (JTAG) Test Access Port
• ZL50232, ZL50233, ZL50234 and ZL50235 have
same pinouts in both LQFP and LBGA packages
Applications
• Voice over IP network gateways
• Voice over ATM, Frame Relay
• T1/E1/J1 multichannel echo cancellation
• Wireless base stations
• Echo Canceller pools
• DCME, satellite and multiplexer system
VDD2 (1.8 V)
ODE
Rin
Sin
MCLK
Fsel
C4i
F0i
Serial
to
Parallel
PLL
Timing
Unit
Echo Canceller Pool
Group 0 Group 1
ECA/ECB ECA/ECB
Microprocessor Interface
Parallel
to
Serial
Note:
Refer to Figure 4
for Echo Canceller
block diagram
Test Port
Rout
Sout
RESET
DS CS R/W A10-A0 DTA D7-D0 IRQ TMS TDI TDO TCK TRST
Figure 1 - ZL50233 Device Overview
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.



ZL50233
ZL50233
Data Sheet
Description
The ZL50233 Voice Echo Canceller implements a cost effective solution for telephony voice-band echo cancellation
conforming to ITU-T G.168 requirements. The ZL50233 architecture contains 2 groups of two echo cancellers (ECA
and ECB) which can be configured to provide two channels of 64 milliseconds or one channel of 128 milliseconds
echo cancellation. This provides 4 channels of 64 milliseconds to 2 channels of 128 milliseconds echo cancellation
or any combination of the two configurations. The ZL50233 supports ITU-T G.165 and G.164 tone disable
requirements.
TMS
TDI
TDO
TCK
VSS
TRSTB
IC0
RESETB
IRQB
DS
CS
R/W
DTA
VDD2
D0
D1
D2
VSS
D3
D4
D5
D6
D7
NC
NC
ZL50233 QC
(100 pin LQFP)
VDD1 = 3.3V
VDD2 = 1.8V
NC
NC
NC
IC0
IC0
IC0
VSS
IC0
IC0
IC0
IC0
VDD2
C4ib
Foib
Rin
Sin
Rout
Sout
ODE
VSS
NC
NC
NC
NC
NC
Figure 2 - 100 Pin LQFP
2
Zarlink Semiconductor Inc.





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