N-Channel MOSFETs. SiZ926DT Datasheet

SiZ926DT MOSFETs. Datasheet pdf. Equivalent

SiZ926DT Datasheet
Recommendation SiZ926DT Datasheet
Part SiZ926DT
Description Dual N-Channel MOSFETs
Feature SiZ926DT; www.vishay.com SiZ926DT Vishay Siliconix Dual N-Channel 25 V (D-S) MOSFETs PowerPAIR® 6 x 5 G2 S.
Manufacture Vishay
Datasheet
Download SiZ926DT Datasheet




Vishay SiZ926DT
www.vishay.com
SiZ926DT
Vishay Siliconix
Dual N-Channel 25 V (D-S) MOSFETs
PowerPAIR® 6 x 5 G2
S2
S2
S2 6
7
8
5 S1/D2
(Pin 9)
6 mm
1 5 mm
Top View
D1 1
4
D1
3
D1
2
D1
G1
Bottom View
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
RDS(on) max. () at VGS = 4.5 V
Qg typ. (nC)
ID (A) a, g
Configuration
CHANNEL-1 CHANNEL-2
25 25
0.00480
0.00220
0.00790
0.00335
5.9 12.5
40 60
Dual
FEATURES
• TrenchFET® Gen IV power MOSFETs
• 100 % Rg and UIS tested
• Optimized Qgs/Qgs ratio improves switching
characteristics
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• CPU core power
• Computer / server peripherals
• POL
• Synchronous buck converter
• Telecom DC/DC
D1
G1
N-Channel 1
MOSFET
S1/D2
G2
N-Channel 2
MOSFET
S2
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAIR 6 x 5
SiZ926DT-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
CHANNEL-1
CHANNEL-2
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
Pulsed drain current (100 μs pulse width)
Continuous source drain diode current
Single pulse avalanche current
Single pulse avalanche energy
Maximum power dissipation
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
25 25
+16, -12
+16, -12
40 a
60 a
40 a
60 a
22 b, c
37 b, c
17.5 b, c
30 b, c
100 170
16.8 33.6
3.2 b, c
4 b, c
15 28
11 39
20.2 40
12.9
25.8
3.8 b, c
4.8 b, c
2.4 b, c
3.1 b, c
-55 to +150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
CHANNEL-1
TYP. MAX.
CHANNEL-2
TYP. MAX.
UNIT
Maximum junction-to-ambient b, f
Maximum junction-to-case (drain)
t 10 s
Steady state
RthJA
RthJC
26 33 21 26
4.7 6.2 2.5 3.1
°C/W
Notes
a. Package limited
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 68 °C/W for channel-1 and 57 °C/W for channel-2
g. TC = 25 °C
S19-0939-Rev. C, 11-Nov-2019
1
Document Number: 68127
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZ926DT
www.vishay.com
SiZ926DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Static
Drain-source breakdown voltage
VDS Temperature coefficient
VGS(th) Temperature coefficient
Gate threshold voltage
VDS
VDS/TJ
VGS(th)/TJ
VGS(th)
VGS = 0 V, ID = 250 μA
VGS = 0 V, ID = 250 μA
ID = 250 μA
ID = 250 μA
ID = 250 μA
ID = 250 μA
VDS = VGS, ID = 250 μA
VDS = VGS, ID = 250 μA
Gate source leakage
IGSS VDS = 0 V, VGS = +16 V, -12 V
Zero gate voltage drain current
On-state drain current b
Drain-source on-state resistance b
Forward transconductance b
Dynamic a
IDSS
ID(on)
RDS(on)
gfs
VDS = 25 V, VGS = 0 V
VDS = 25 V, VGS = 0 V
VDS = 25 V, VGS = 0 V, TJ = 55 °C
VDS = 25 V, VGS = 0 V, TJ = 55 °C
VDS 5 V, VGS = 10 V
VDS 5 V, VGS = 10 V
VGS = 10 V, ID = 5 A
VGS = 10 V, ID = 8 A
VGS = 4.5 V, ID = 3 A
VGS = 4.5 V, ID = 5 A
VGS = 10 V, ID = 5 A
VGS = 10 V, ID = 8 A
Input capacitance
Ciss
Output capacitance
Reverse transfer capacitance
Coss
Crss
Channel-1
VDS = 10 V, VGS = 10 V, f = 1 MHz
Channel-2
VDS = 10 V, VGS = 10 V, f = 1 MHz
Crss/Ciss ratio
Total gate charge
Gate-source charge
Gate-drain charge
VDS = 10 V, VGS = 10 V, ID = 5 A
Qg
VDS = 10 V, VGS = 10 V, ID = 8 A
VDS = 10 V, VGS = 4.5 V, ID = 5 A
VDS = 10 V, VGS = 4.5 V, ID = 8 A
Qgs
Channel-1
VDS = 10 V, VGS = 4.5 V, ID = 5 A
Qgd
Channel-2
VDS = 10 V, VGS = 4.5 V, ID = 8 A
Output charge
Qoss
VDS = 10 V, VGS = 0 V
Gate resistance
Rg f = 1 MHz
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
MIN. TYP. MAX. UNIT
25 -
25 -
-
V
-
- 19 -
- 15 -
mV/°C
- 4.9 -
- 4.6 -
1.1 - 2.2
V
1.1 - 2.4
- - 100
nA
- - 100
- -1
- -1
μA
- - 10
- - 10
20 -
20 -
-
A
-
- 0.00380 0.00480
- 0.00173 0.00220
- 0.00640 0.00790
- 0.00265 0.00335
- 40 -
S
- 55 -
- 925 -
- 2150 -
- 310 -
pF
- 800 -
- 52 -
- 100 -
- 0.056 0.115
- 0.047 0.095
- 12.5 19
- 27 41
- 5.9 8.9
- 12.5 19
- 2.5 -
nC
- 5.4 -
- 1.2 -
- 2.1 -
-5-
- 13 -
0.18 0.92
1.9
0.12 0.6
1.2
S19-0939-Rev. C, 11-Nov-2019
2
Document Number: 68127
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZ926DT
www.vishay.com
SiZ926DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Dynamic a
Turn-on delay time
Rise time
td(on)
tr
Channel-1
VDD = 10 V, RL = 2
ID 5 A, VGEN = 10 V, Rg = 1
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
8 20
10 20
20 40
20 40
Turn-off delay time
Fall time
Turn-on delay time
Rise time
td(off)
tf
td(on)
tr
Channel-2
VDD = 10 V, RL = 2
ID 5 A, VGEN = 10 V, Rg = 1
Channel-1
VDD = 10 V, RL = 2
ID 5 A, VGEN = 4.5 V, Rg = 1
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
-
-
-
-
12 25
17 35
8 20
8 20
ns
12 25
16 35
47 100
40 80
Turn-off delay time
Fall time
td(off)
tf
Channel-2
VDD = 10 V, RL = 2
ID 10 A, VGEN = 4.5 V, Rg = 1
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
6 15
13 30
12 25
12 25
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulse diode forward current (t = 100 μs)
IS
ISM
TC = 25 °C
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
- 16.8
- 33.6
A
- 100
- 170
Body diode voltage
Body diode reverse recovery time
VSD
trr
IS = 5 A, VGS = 0 V
IS = 8 A, VGS = 0 V
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
0.81 1.2
0.77 1.2
V
25 50
ns
20 40
Body diode reverse recovery charge
Channel-1
Ch-1
-
Qrr IF = 5 A, di/dt = 100 A/μs, TJ = 25 °C Ch-2 -
15 30
nC
15 30
Reverse recovery fall time
Reverse recovery rise time
ta
Channel-2
Ch-1
IF = 8 A, di/dt = 100 A/μs, TJ = 25 °C Ch-2
-
-
13.5
13
-
-
ns
Ch-1
-
11.5
-
tb
Ch-2
-
7
-
Notes
a. Guaranteed by design, not subject to production testing
b. Pulse test; pulse width 300 μs, duty cycle 2 %
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S19-0939-Rev. C, 11-Nov-2019
3
Document Number: 68127
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000







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