N-Channel MOSFET. SiZF916DT Datasheet

SiZF916DT MOSFET. Datasheet pdf. Equivalent

SiZF916DT Datasheet
Recommendation SiZF916DT Datasheet
Part SiZF916DT
Description Dual N-Channel MOSFET
Feature SiZF916DT; www.vishay.com SiZF916DT Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFET with Schottky Diode FE.
Manufacture Vishay
Datasheet
Download SiZF916DT Datasheet




Vishay SiZF916DT
www.vishay.com
SiZF916DT
Vishay Siliconix
Dual N-Channel 30 V (D-S) MOSFET with Schottky Diode
FEATURES
• TrenchFET® Gen IV power MOSFET
• SkyFET® low-side MOSFET with integrated
Schottky
• 100 % Rg and UIS tested
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
RDS(on) max. () at VGS = 4.5 V
Qg typ. (nC)
ID (A) a
Configuration
CHANNEL-1 CHANNEL-2
30 30
0.00400
0.00125
0.00670
0.00175
7 29.3
40 60
Dual
APPLICATIONS
• CPU core power
N-Channel 1
MOSFET
• Computer / server peripherals GHS/G1
• POL
G1Return/S1
• Synchronous buck converter
• Telecom DC/DC
GLS/G2
N-Channel 2
MOSFET
VIN/D1
VSW/S1-D2
Schottky
Diode
GND/S2
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAIR 6 x 5F
SiZF916DT-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
CHANNEL-1
CHANNEL-2
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
Pulsed drain current (t = 100 μs)
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Continuous source-drain diode current
Single pulse avalanche current
Single pulse avalanche energy
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
Maximum power dissipation
TC = 70 °C
TA = 25 °C
TA = 70 °C
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d, e
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
30
+20, -16
40 a
40 a
23 b, c
18.4 b, c
130
22
2.8 b, c
15
11.3
26.6
17
3.4 b, c
2.2 b, c
-55 to +150
260
30
+16, -12
60 a
60 a
45 b, c
36 b, c
110
60 a
7 b, c
25
31
60
38
4 b, c
2.6 b, c
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
CHANNEL-1
TYP.
MAX.
CHANNEL-2
TYP.
MAX.
UNIT
Maximum junction-to-ambient b, f
Maximum junction-to-case (source)
t 10 s
RthJA
30
37
25
31
°C/W
Steady state
RthJC
3.8
4.7
1.7
1.7
Notes
a. Package limited
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 77 °C/W for channel-1 and 68 °C/W for channel-2
S17-1591 Rev. A, 16-Oct-17
1
Document Number: 75698
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZF916DT
www.vishay.com
SiZF916DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Static
Drain-source breakdown voltage
VDS
VGS = 0 V, ID = 250 μA
Gate-source threshold voltage
Gate-source leakage
Zero Gate voltage drain current
VGS(th)
IGSS
IDSS
VDS = VGS, ID = 250 μA
VDS = 0 V, VGS = +20 V, -16 V
VDS = 0 V, VGS = +16 V, -12 V
VDS = 30 V, VGS = 0 V
VDS = 30 V, VGS = 0 V, TJ = 55 °C
On-state drain current b
Drain-source on-state resistance b
Forward transconductance b
Dynamic a
Input capacitance
Output capacitance
ID(on)
RDS(on)
gfs
VDS 5 V, VGS = 10 V
VGS = 10 V, ID = 10 A
VGS = 10 V, ID = 10 A
VGS = 4.5 V, ID = 5 A
VGS = 4.5 V, ID = 5 A
VDS = 10 V, ID = 20 A
VDS = 10 V, ID = 20 A
Ciss
Coss
Channel-1
VDS = 15 V, VGS = 0 V, f = 1 MHz
Reverse transfer capacitance
Crss/Ciss ratio
Crss Channel-2
VDS = 15 V, VGS = 0 V, f = 1 MHz
Total gate charge
Gate-source charge
Gate-drain charge
VDS = 15 V, VGS = 10 V, ID = 10 A
Qg
Channel-1
VDS = 15 V, VGS = 4.5 V, ID = 10 A
Qgs
Channel-2
Qgd VDS = 15 V, VGS = 4.5 V, ID = 10 A
Output charge
Qoss
VDS = 15 V, VGS = 0 V
Gate resistance
Rg f = 1 MHz
MIN. TYP. MAX. UNIT
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
30 -
-
30 -
1.1 -
-
V
2.4
1.1 -
2.2
- - ± 100
nA
- - ± 100
-- 1
- 35 350
μA
-- 5
- 250 3000
20 -
20 -
-
A
-
- 0.00290 0.00400
- 0.00090 0.00125
- 0.00470 0.00680
- 0.00125 0.00175
- 53
-
S
91 -
Ch-1
-
1060
-
Ch-2
-
4320
-
Ch-1
Ch-2
-
-
600
1840
-
-
pF
Ch-1
-
45
-
Ch-2
-
260
-
Ch-1 - 0.042 0.085
Ch-2
0.060 0.120
Ch-1
-
14.6
22
Ch-2
-
62
95
Ch-1
7 11
Ch-2
-
29.3
45
Ch-1
-
3
-
nC
Ch-2
-
10.2
-
Ch-1
-
1.5
-
Ch-2
-
5.2
-
Ch-1
-
14
-
Ch-2
-
46
-
Ch-1
Ch-2
0.2
0.1
1
0.41
2
0.82
S17-1591 Rev. A, 16-Oct-17
2
Document Number: 75698
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZF916DT
www.vishay.com
SiZF916DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Dynamic a
Turn-on delay time
Rise time
td(on)
tr
Channel-1
VDD = 15 V, RL = 3
ID 5 A, VGEN = 4.5 V, Rg = 1
Turn-off delay time
Fall time
td(off)
tf
Channel-2
VDD = 15 V, RL = 3
ID 5 A, VGEN = 4.5 V, Rg = 1
Turn-on delay time
Rise time
td(on)
tr
Channel-1
VDD = 15 V, RL = 3
ID 5 A, VGEN = 10 V, Rg = 1
Turn-off delay time
td(off)
Fall time
tf
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Channel-2
VDD = 15 V, RL = 3
ID 5 A, VGEN = 10 V, Rg = 1
TC = 25 °C
Pulse diode forward current a
Body diode voltage
Body diode reverse recovery time
Body diode reverse recovery charge
ISM
IS = 5 A, VGS = 0 V
VSD
IS = 3 A, VGS = 0 V
trr
Channel-1
Qrr IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C
Reverse recovery fall time
ta Channel-2
IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C
Reverse recovery rise time
tb
Notes
a. Guaranteed by design, not subject to production testing
b. Pulse test; pulse width 300 μs, duty cycle 2 %
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
MIN.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP.
17
30
45
60
20
45
10
20
10
15
5
25
20
40
5
10
-
-
-
-
0.8
0.38
32
55
24
72
18
27
14
28
MAX. UNIT
35
60
90
120
40
90
20
40
ns
20
30
10
50
40
80
10
20
22
60
A
130
110
1.2
V
0.58
70
ns
110
50
nC
150
-
-
ns
-
-
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S17-1591 Rev. A, 16-Oct-17
3
Document Number: 75698
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000







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