N-Channel MOSFET. SiZF906DT Datasheet

SiZF906DT MOSFET. Datasheet pdf. Equivalent

SiZF906DT Datasheet
Recommendation SiZF906DT Datasheet
Part SiZF906DT
Description Dual N-Channel MOSFET
Feature SiZF906DT; www.vishay.com SiZF906DT Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFET with Schottky Diode PR.
Manufacture Vishay
Datasheet
Download SiZF906DT Datasheet




Vishay SiZF906DT
www.vishay.com
SiZF906DT
Vishay Siliconix
Dual N-Channel 30 V (D-S) MOSFET with Schottky Diode
FEATURES
• TrenchFET® Gen IV power MOSFET
• SkyFET® low-side MOSFET with integrated
Schottky
• 100 % Rg and UIS tested
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
RDS(on) max. () at VGS = 4.5 V
Qg typ. (nC)
ID (A) a
Configuration
CHANNEL-1 CHANNEL-2
30 30
0.00380
0.00117
0.00530
0.00158
11 46
60 60
Dual
APPLICATIONS
• CPU core power
N-Channel 1
MOSFET
• Computer / server peripherals GHS/G1
• POL
G1Return/S1
• Synchronous buck converter
• Telecom DC/DC
GLS/G2
N-Channel 2
MOSFET
VIN/D1
VSW/S1-D2
Schottky
Diode
GND/S2
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAIR 6 x 5F
SiZF906DT-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
CHANNEL-1
CHANNEL-2
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
Pulsed drain current (t = 100 μs)
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Continuous source-drain diode current
Single pulse avalanche current
Single pulse avalanche energy
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
Maximum power dissipation
TC = 70 °C
TA = 25 °C
TA = 70 °C
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d, e
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
30
+20, -16
60 a
60 a
27 b, c
21.7 b, c
80
31.6
3.7 b, c
18
16
38
24
4.5 b, c
2.9 b, c
-55 to +150
260
30
+20, -16
60 a
60 a
52 b, c
41 b, c
100
60 a
4.1 b, c
19
18
83
53
5 b, c
3.2 b, c
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
CHANNEL-1
TYP.
MAX.
CHANNEL-2
TYP.
MAX.
UNIT
Maximum junction-to-ambient b, f
Maximum junction-to-case (source)
t 10 s
RthJA
22
28
20
25 °C/W
Steady state
RthJC
2.6
3.3
1.2
1.5
Notes
a. Package limited
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 60 °C/W for channel-1 and 60 °C/W for channel-2
S19-0288 Rev. B, 08-Apr-2019
1
Document Number: 67547
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZF906DT
www.vishay.com
SiZF906DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Static
Drain-source breakdown voltage
VDS
VGS = 0 V, ID = 250 μA
Drain-source breakdown voltage c
(transient)
VDSt
VGS = 0 V, t(transient) 1 μs
Gate-source threshold voltage
VGS(th)
VDS = VGS, ID = 250 μA
Gate-source leakage
IGSS VDS = 0 V, VGS = +20 V, -16 V
Zero Gate voltage drain current
VDS = 30 V, VGS = 0 V
IDSS
VDS = 30 V, VGS = 0 V, TJ = 55 °C
On-state drain current b
Drain-source on-state resistance b
Forward transconductance b
Dynamic a
Input capacitance
Output capacitance
Reverse transfer capacitance
Crss/Ciss ratio
ID(on)
RDS(on)
gfs
VDS 5 V, VGS = 10 V
VGS = 10 V, ID = 15 A
VGS = 10 V, ID = 20 A
VGS = 4.5 V, ID = 10 A
VGS = 4.5 V, ID = 15 A
VDS = 10 V, ID = 15 A
VDS = 10 V, ID = 20 A
Ciss
Coss
Crss
Channel-1
VDS = 15 V, VGS = 0 V, f = 1 MHz
Channel-2
VDS = 15 V, VGS = 0 V, f = 1 MHz
Total gate charge
Gate-source charge
Gate-drain charge
VDS = 15 V, VGS = 10 V, ID = 20 A
Qg
Channel-1
VDS = 15 V, VGS = 4.5 V, ID = 20 A
Qgs
Channel-2
Qgd VDS = 15 V, VGS = 4.5 V, ID = 20 A
Output charge
Qoss
VDS = 15 V, VGS = 0 V
Gate resistance
Rg f = 1 MHz
MIN. TYP. MAX. UNIT
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
30 -
-
30 -
-
36 -
36 -
-
V
-
1.1 -
2.2
1.1 -
2.2
- - ± 100
nA
- - ± 100
-- 1
- 50 250
μA
-- 5
- 300 3000
20 -
20 -
-
A
-
- 0.00300 0.00380
- 0.00090 0.00117
- 0.00400 0.00530
- 0.00120 0.00158
- 130
130
-
-
S
Ch-1
-
2000
-
Ch-2
-
8200
-
Ch-1
-
680
-
Ch-2
-
3700
-
Ch-1
-
50
-
Ch-2
-
260
-
Ch-1 - 0.025 0.050
Ch-2
0.033 0.070
Ch-1
-
24.5
49
Ch-2
-
100 200
Ch-1
11 22
Ch-2
-
46
92
Ch-1
-
5.1
-
Ch-2
-
17.1
-
Ch-1
-
1.3
-
Ch-2
-
7.2
-
Ch-1
-
21
-
Ch-2
-
96
-
Ch-1 0.2
1
2
Ch-2 0.12
0.6
1.2
pF
nC
S19-0288 Rev. B, 08-Apr-2019
2
Document Number: 67547
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay SiZF906DT
www.vishay.com
SiZF906DT
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Dynamic a
Turn-on delay time
Rise time
td(on)
tr
Channel-1
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 4.5 V, Rg = 1
Turn-off delay time
Fall time
td(off)
tf
Channel-2
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 4.5 V, Rg = 1
Turn-on delay time
td(on)
Rise time
tr
Turn-off delay time
td(off)
Fall time
tf
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Channel-1
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 10 V, Rg = 1
Channel-2
VDD = 15 V, RL = 1.5
ID 10 A, VGEN = 10 V, Rg = 1
TC = 25 °C
Pulse diode forward current a
Body diode voltage
Body diode reverse recovery time
Body diode reverse recovery charge
ISM
VSD
trr
Qrr
IS = 10 A, VGS = 0 V
IS = 3 A, VGS = 0 V
Channel-1
IF = 10 A, di/dt = 100 A/μs,
TJ = 25 °C
Reverse recovery fall time
Reverse recovery rise time
ta Channel-2
IF = 10 A, di/dt = 100 A/μs,
TJ = 25 °C
tb
Notes
a. Guaranteed by design, not subject to production testing
b. Pulse test; pulse width 300 μs, duty cycle 2 %
c. Based on characterization, not subject to production testing
MIN.
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
Ch-1
Ch-2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP.
20
45
80
60
20
65
40
30
10
15
35
20
20
40
10
10
-
-
-
-
0.8
0.39
35
70
20
105
15
37
20
33
MAX. UNIT
40
90
160
120
40
130
80
60
ns
20
30
70
40
40
80
20
20
31.6
60
A
80
100
1.2
V
0.59
90
ns
140
40
nC
210
-
-
ns
-
-
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S19-0288 Rev. B, 08-Apr-2019
3
Document Number: 67547
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)