Voltage Regulator. AF6212 Datasheet

AF6212 Regulator. Datasheet pdf. Equivalent

AF6212 Datasheet
Recommendation AF6212 Datasheet
Part AF6212
Description Low Noise CMOS Voltage Regulator
Feature AF6212; Ultra Fast High PSRR Low Noise CMOS LDO AF6212 Ultra Fast High PSRR Low Noise CMOS Voltage Regulat.
Manufacture AFSEMI
Datasheet
Download AF6212 Datasheet




AFSEMI AF6212
Ultra Fast High PSRR Low Noise CMOS LDO
AF6212
Ultra Fast High PSRR
Low Noise CMOS Voltage Regulator
AF6212
INTRODUCTION
The AF6212 series are a group of positive
voltage regulators manufactured by CMOS
technologies with high ripple rejection, ultra
low noise, low power consumption and low
dropout voltage, which can prolong battery
life in portable electronics. The AF6212
series work with low-ESR ceramic
capacitors, reducing the amount of board
space necessary for power applications.
The AF6212 series consume less than
0.1μA in shutdown mode and have fast
turn-on time less than 50μS.The series are
very suitable for the battery-powered
equipments, such as RF applications and
other systems requiring a quiet voltage
source.
FEATURES
Low Output Noise40μVRMS
(10Hz~100kHz)
Low Dropout Voltage150mV@150mA
Low Quiescent Current50μA
High Ripple Rejection75dB@1kHz
Excellent Line and Load Transient
Response
Operating Voltage Range2.0V6.0V
Output Voltage Range1.0V ~ 5.0V
High Accuracy±2%(Typ.
Built-in Current Limiter, Short-Circuit
Protection
TTL- Logic-Controlled Shutdown Input
APPLICATIONS
Cellular and Smart Phones
Laptop, Palmtops and PDA
Digital Still and Video Cameras
BLOCK DIAGRAM
MP3, MP4 Player
Radio control systems
Battery-Powered Equipment
ORDER INFORMATION
AF6212__
DESIGNATOR SYMBOL
DESCRIPTION
Integer
Output Voltage
e.g.1.8V=18
Package:SOT23-5 C
Package:DFN1×1-4 D
Analog Future Ver2.2
1 www.afsemi.com



AFSEMI AF6212
Ultra Fast High PSRR Low Noise CMOS LDO
PIN CONFIGURATION
SOT23-5
DFN1×1-4
43
AF6212
SOT-23-5
PIN NUMBER
1
2
3
4
5
12
SYMBOL
VIN
VSS
CE
NC
VOUT
FUNCTION
Power Input Pin
Ground
Chip Enable Pin
No Connection
Output Pin
DFN1×1-4
PIN NUMBER
1
2
3
4
SYMBOL
VOUT
VSS
CE
VIN
FUNCTION
Output Pin
Ground
Chip Enable Pin
Power Input Pin
Marking information
MARKING
Package
VOLTAGE(V) DFN1X1 SOT23-5
1.2 1V2 LVBX
1.5 1V5 LVEX
1.8 1V8 LVKX
2.5 2V5 LVFX
2.8 2V8 LVXX
3.0 3V0 LVZX
3.3 3V3 LV2X
Analog Future Ver2.2
2 www.afsemi.com



AFSEMI AF6212
Ultra Fast High PSRR Low Noise CMOS LDO
TYPICAL APPLICATION
VIN
CIN
Ceramic
1μF
VIN VOUT
VSS
VOUT
COUT
Ceramic
1μF
VIN
CIN
Ceramic
1μF
VIN VOUT
CE
VSS
AF6212
VOUT
COUT
Ceramic
1μF
ABSOLUTE MAXIMUM RATINGS(1)
PARAMETER
Input Voltage(2)
Output Voltage(2)
Output Current
Power Dissipation
SOT23-5
DFN1X1-4
(Unless otherwise specified, TA=25°C)
SYMBOL
RATINGS UNITS
VIN
VOUT
-0.3~ 7
-0.3~VIN+0.3
V
V
IOUT 500 mA
0.4 W
PD 0.4 W
Operating free air temperature range
Operating Junction Temperature Range(3)
Storage Temperature
Lead Temperature(Soldering, 10 sec)
Package Thermal Resistance(θJA
TA
Tj
Tstg
Tsolder
SOT23-5
DFN1X1-4
-40~85
-40~125
-40~125
260
285
280
°C
°C
°C
°C
°C/ W
°C/ W
ESD rating(4)
Human Body Model -(HBM)
Machine Model- (MM)
4
200
kV
V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under recommended operating conditions is not implied. Exposure to
absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) All voltages are with respect to network ground terminal.
(3) This IC includes over temperature protection that is intended to protect the device during momentary
overload. Junction temperature will exceed 125°C when over temperature protection is active. Continuous
operation above the specified maximum operating junction temperature may impair device reliability.
(4) ESD testing is performed according to the respective JESD22 JEDEC standard.
The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The
machine model is a 200pF capacitor discharged directly into each pin.
Analog Future Ver2.2
3 www.afsemi.com







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