Emulator Device. R6500-1E Datasheet

R6500-1E Device. Datasheet pdf. Equivalent

Part R6500-1E
Description Microprocessor Emulator Device
Feature '1'Rockwell R6500l1E R6500/1E Microprocessor Emulator Device INTRODUCTION The R6500/1 E device pro.
Manufacture Rockwell
Datasheet
Download R6500-1E Datasheet



R6500-1E
'1'Rockwell
R6500l1E
R6500/1E
Microprocessor Emulator Device
INTRODUCTION
The R6500/1 E device provides all the features of the R6500/1
Microcomputer in a ROMless form suitable for use as an
advanced microprocessor complete with 16-bit counter and 32
110 lines, and an address and data bus for 4K of external memory.
To aid in designing R6500/1 microcomputer systems, it may also
be used as an emulator device. Device architecture is basically
the same as the R6500/1 except that the address, data, and
associated control lines are routed off the chip for connection to
an external memory.
The functions and operation of the R6500/1 E device are identi-
cal to the R6500/1 except for minor differences noted in this
document. The R6500/1 Product Description (Order No. 212) con-
tains a description of R6500/1 functions and interface signals.
The R6500/1 E device is available in both 64-pin ceramic DIP
(R6500/1 EC) and 64-pin plastic QUIP (R6500/1 EQ).
ORDERING INFORMATION
Part
Number
R6500/1EC
R6500/1EAC
R6500/1EO
R6500/1EAO
Package
Type
Ceramic
Ceramic
Plastic
Plastic
Frequency
Option
1 MHz
2 MHz
1 MHz
2MHz
Temperature
Range
O·Cta 70·C
O·Cto 70·C
O·Cta 70·C
O·Cta 70·C
112
VSS
ROY
RES
NMI
SYNC
PB7
PB6
PBS
PB4
PB3
PB2
PBl
PBO
PA7
PA6
PAS
PA4
PA3
PA2
PAl
PAD
VRR
CNTR
AD
Al
A2
A3
A4
AS
A6
A7
R6S00/l E (64-PIN DIP)
XTLO
XTLI
Rfii
PCO
PCl
PC2
PC3
PC4
PCS
PC6
PC7
DO
01
02
03
04
05
06
07
P07
P06
POS
P04
P03
P02
POl
POO
All
Al0
A9
AS
VCC
112
VSS
ROY
RES
NMI
SYNC
PB7
PB6
PBS
PB4
PB3
PB2
PBl
PBO
PA7
PA6
PAS
PA4
PA3
PA2
PAl
PAD
VRR
CNTR
AD
Al
A2
A3
A4
AS
A6
A7
XTLO
XTLI
Rfii
PCO
PCl
PC2
PC3
PC4
PCS
PC6
PC7
DO
01
02
03
04
05
06
07
P07
P06
POS
P04
P03
P02
POl
POD
All
Al0
A9
AS
VCC
R6S00/1Ea (64-PIN aUIP)
R6500/1 E Pin Assi9nments
Document No. 29000D51S
Data Sheet
3-49
Order No_ D51S
Rev. 3, June 1987



R6500-1E
R6500/1E
INTERFACE SIGNALS
All R650011 interface signals are available in the R6500l1E
microcomputer plus the additional address (12), data (8), and con-
trol (4) lines required to extend the address bus and the data bus
external to the device. The R6500/1E emulator unique interface
signals are shown in Figure 1 and are described in Table 1. While
the pin assignments are different in order to accommodate
64-pin DIP and QUIP packages, the interface characteristics of
signals common to the R650011 are identical.
SYSTEM ARCHITECTURE
The architecture of the R6500l1E is identical to the R6500/1 with
the following differences:
EXTERNAL ADDRESSING
ROM addressing is routed externally in the R650011E. The address
range for internal ROM in the R6500/1 ($800-$FF9) is available
externally for connection to ROM or RAM devices(s).
An additional 1024 bytes ($400-$7FF) are decoded for external
memory access. Note that this address range can be used for
Microprocessor Emulator Device
debugging with the R650011E but cannot be used when the object
code is transferred to masked ROM in an R650011 (which is res-
tricted to $800-$FF9).
A memory map of the R6500l1E is shown in Figure 2.
INTERNAL 1/0 PORT PULL-UPS
The R6500/1E has the internal I/O and CNTR port pull-up resis-
tors only. The option to delete the pull-up resistors is not availa-
ble for the R6500/1 E.
I
EARLIER I/O PORT INITIALIZATION
Ports A, B, C, D and the CNTR line in the R6500/1 Eare initialized
to the logic high state two 02 clock cycles earlier than in the
ResOO/l.lt is still required, however, thatthe RES line be held low
for at least eight 02 clock cycles after VCC reaches operating range
(Figure 3).
WRITE-ONLY MONITORING
The R6500l1E allows the user to monitor write operations to the
internal RAM and I/O by routing those operations externally as well
as internally. Read operations are not routed externally.
POWER
VRR
Vss
rrCRYSTAL
XTLO
EMULATOR
CONTROL
12 ADDRESS
LINES
8 DATA
LINES
\12
ROY
SYNC
R/W
R6500/1E
SINGLE CHIP
MICROCOMPUTER
EMULATOR
8-BIT
PORTA
PAD-PA7
8-BIT
PORTB
PBO-PB7
8-BIT
PORTC
PCO-PC7
8-BIT
PORTO
PDO-PD7
CNTR
NMI
TO
INTERFACE
DEVICES
RES
Figure 1. R6500/1E Emulator Interface Diagram
3-50





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