ESMT
SDRAM
M12L16161A (2R)
512K x 16Bit x 2Banks Synchronous DRAM
FEATURES
GENERAL DESCRIPTION
JEDEC standard 3.3V power supply
The M12L16161A is 16,777,216 bits synchronous high data
LVTTL compatible with multiplexed address
rate Dynamic RAM organized as 2 x 524,288 words by 16 bits,
Dual banks operation MRS cycle with address key programs
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