Crossover Processors. IMXRT1015IEC Datasheet

IMXRT1015IEC Processors. Datasheet pdf. Equivalent


NXP IMXRT1015IEC
NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMXRT1015IEC
Rev. 0.1, 03/2019
i.MX RT1015 Crossover
Processors Data Sheet
for Industrial Products
MIMXRT1015CAF4A
Package Information
Plastic Package
100-Pin LQFP, 14 x 14 mm, 0.5 mm pitch
Ordering Information
1 i.MX RT1015 introduction
See Table 1 on page 4
The i.MX RT1015 is a processor of i.MX RT family
1. i.MX RT1015 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1
featuring NXP’s advanced implementation of the Arm® 1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Cortex®-M7 core, which operates at speeds up to 396
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 4
2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
MHz to provide high CPU performance and real-time
2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
response.
3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1. Special signal considerations . . . . . . . . . . . . . . . 12
The i.MX RT1015 processor has 128 KB on-chip RAM,
3.2. Recommended connections for unused analog
interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
which can be flexibly configured as TCM or
4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 14
general-purpose on-chip RAM. The i.MX RT1015
integrates advanced power management module with
4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 14
4.2. System power and clocks . . . . . . . . . . . . . . . . . . 20
4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DCDC and LDO that reduces complexity of external
power supply and simplifies power sequencing. The
i.MX RT1015 also provides various memory interfaces,
4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.5. External memory interface . . . . . . . . . . . . . . . . . 36
4.6. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.7. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
including Quad SPI, and a wide range of connectivity
interfaces including UART, SPI, I2C, and USB; for
4.8. Communication interfaces . . . . . . . . . . . . . . . . . . 51
4.9. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 57
connecting peripherals including Bluetooth™, and GPS. 5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 57
The i.MX RT1015 also has rich audio features, including
6.
5.2. Boot device interface allocation . . . . . . . . . . . . . . 57
Package information and contact assignments . . . . . . . 60
SPDIF and I2S audio interface. Various analog IP
6.1. 14 x 14 mm package information . . . . . . . . . . . . 60
integration, including ADC, temperature sensor, etc.
7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.


IMXRT1015IEC Datasheet
Recommendation IMXRT1015IEC Datasheet
Part IMXRT1015IEC
Description Crossover Processors
Feature IMXRT1015IEC; NXP Semiconductors Data Sheet: Technical Data Document Number: IMXRT1015IEC Rev. 0.1, 03/2019 i.MX.
Manufacture NXP
Datasheet
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NXP IMXRT1015IEC
i.MX RT1015 introduction
The i.MX RT1015 is specifically useful for applications such as:
• Industrial
• Motor Control
• Home Appliance
• Audio
• IoT
1.1 Features
The i.MX RT1015 processors are based on Arm Cortex-M7 MPCore™ Platform, which has the
following features:
• Supports single Arm Cortex-M7 with:
— 16 KB L1 Instruction Cache
— 16 KB L1 Data Cache
— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture
— Support the Armv7-M Thumb instruction set
• Integrated MPU, up to 16 individual protection regions
• Up to 128 KB I-TCM and D-TCM in total
• Frequency of 396 MHz
• Cortex M7 CoreSight™ components integration for debug
• Frequency of the core, as per Table 9, "Operating ranges (Consumer)," on page 16.
The SoC-level memory system consists of the following additional components:
— Boot ROM (96 KB)
— On-chip RAM (128 KB)
– Configurable RAM size up to 128 KB shared with CM7 TCM
• External memory interfaces:
— SPI NOR FLASH
— Parallel NOR FLASH with XIP support
— Single/Dual channel Quad SPI FLASH with XIP support
• Timers and PWMs:
— Two General Programmable Timers
– 4-channel generic 32-bit resolution timer
– Each support standard capture and compare operation
— Four Periodical Interrupt Timers
– Generic 32-bit resolution timer
– Periodical interrupt generation
— One Quad Timer
– 4-channel generic 16-bit resolution timer
i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 0.1, 03/2019
2 NXP Semiconductors



NXP IMXRT1015IEC
i.MX RT1015 introduction
– Each support standard capture and compare operation
– Quadrature decoder integrated
— One FlexPWM
– Up to 8 individual PWM channels
– 16-bit resolution PWM suitable for Motor Control applications
— One Quadrature Encoder/Decoder
Each i.MX RT1015 processor enables the following interfaces to external devices (some of them are
muxed and not available simultaneously):
• Audio:
— S/PDIF input and output
— Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and
codec/DSP interfaces
— MQS interface for medium quality audio via GPIO pads
• Connectivity:
— One USB 2.0 OTG controller with integrated PHY interface
— Four universal asynchronous receiver/transmitter (UARTs) modules
— Two I2C modules
— Two SPI modules
• GPIO and Pin Multiplexing:
— General-purpose input/output (GPIO) modules with interrupt capability
— Input/output multiplexing controller (IOMUXC) to provide centralized pad control
— 57 GPIOs
— One FlexIO
The i.MX RT1015 processors integrate advanced power management unit and controllers:
• Full PMIC integration, including on-chip DCDC and LDOs
• Temperature sensor with programmable trip points
• GPC hardware power management controller
The i.MX RT1015 processors support the following system debug:
• Arm CortexM7 CoreSight debug and trace architecture
• Trace Port Interface Unit (TPIU) to support off-chip real-time trace
• Support for 5-pin (JTAG) and SWD debug interfaces selected by eFuse
Security functions are enabled and accelerated by the following hardware:
• High Assurance Boot (HAB)
• Data Co-Processor (DCP):
— AES-128, ECB, and CBC mode
— SHA-1 and SHA-256
— CRC-32
i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 0.1, 03/2019
NXP Semiconductors
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