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ADGS5414 Mux. Datasheet pdf. Equivalent

ADGS5414 Datasheet
Recommendation ADGS5414 Datasheet
Part ADGS5414
Description SPI Interface / Octal SPST Switches / Mux
Feature ADGS5414; Data Sheet SPI Interface, Octal SPST Switches, 13.5 Ω RON, ±20 V/+36 V, Mux ADGS5414 FEATURES SPI .
Manufacture Analog Devices
Datasheet
Download ADGS5414 Datasheet




Analog Devices ADGS5414
Data Sheet
SPI Interface, Octal SPST Switches,
13.5 Ω RON, ±20 V/+36 V, Mux
ADGS5414
FEATURES
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Supports burst and daisy-chain mode
Industry-standard SPI Mode 0 and Mode 3 interface-
compatible
Guaranteed break-before-make switching, allowing external
wiring of switches to deliver multiplexer configurations
VSS to VDD analog signal range
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
9 V to 40 V single-supply operation (VDD)
±9 V to ±22 V dual-supply operation (VDD/VSS)
8 kV HBM ESD rating
Low on resistance
1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
APPLICATIONS
Relay replacement
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
FUNCTIONAL BLOCK DIAGRAM
ADGS5414
S1 D1
S2 D2
S3 D3
S4 D4
S5 D5
S6 D6
S7 D7
S8 D8
SPI
INTERFACE
SDO
SCLK SDI CS RESET/VL
Figure 1.
GENERAL DESCRIPTION
The ADGS5414 contains eight independent single-pole/single-
throw (SPST) switches. An SPI interface controls the switches
and has robust error detection features, including cyclic
redundancy check (CRC) error detection, invalid read/write
address error detection, and SCLK count error detection.
It is possible to daisy-chain multiple ADGS5414 devices together.
This enables the configuration of multiple devices with a minimal
amount of digital lines. The ADGS5414 can also operate in burst
mode to decrease the time between SPI commands.
Each switch conducts equally well in both directions when on, and
each switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The on-resistance profile is flat over the full analog input range,
ensuring ideal linearity and low distortion when switching
audio signals. The ADGS5414 exhibits break-before-make
switching action, allowing the use of the device in multiplexer
applications with external wiring.
Rev. 0
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PRODUCT HIGHLIGHTS
1. The SPI interface removes the need for parallel conversion,
logic traces, and reduces the general-purpose input/output
(GPIO) channel count.
2. Daisy-chain mode removes the need for additional logic
traces when using multiple devices.
3. CRC error detection, invalid read/write address error
detenction, and SCLK count error detection ensures a
robust digital interface.
4. CRC and error detection capabilities allow the use of the
ADGS5414 in safety critical systems.
5. Break-before-make switching allows external wiring of the
switches to deliver multiplexer configurations.
6. The trench isolation analog switch section guards against
latch-up. A dielectric trench separates the positive and
negative channel transistors, preventing latch-up even under
severe overvoltage conditions.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com



Analog Devices ADGS5414
ADGS5414
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Functional Block Diagram .............................................................. 1 
General Description ......................................................................... 1 
Product Highlights ........................................................................... 1 
Revision History ............................................................................... 1 
Specifications..................................................................................... 3 
±15 V Dual Supply ....................................................................... 3 
±20 V Dual Supply ....................................................................... 5 
12 V Single Supply........................................................................ 7 
36 V Single Supply........................................................................ 9 
Continuous Current per Channel, Sx or Dx Pins .................. 11 
Timing Characteristics .............................................................. 11 
Absolute Maximum Ratings.......................................................... 13 
Thermal Resistance .................................................................... 13 
ESD Caution................................................................................ 13 
Pin Configurations and Function Descriptions ......................... 14 
Typical Performance Characteristics ........................................... 15 
Test Circuits..................................................................................... 19 
Terminology .................................................................................... 21 
Theory of Operation ...................................................................... 22 
Address Mode ............................................................................. 22 
REVISION HISTORY
10/2017—Revision 0: Initial Version
Data Sheet
Error Detection Features ........................................................... 22 
Clearing the Error Flags Register ............................................. 23 
Burst Mode.................................................................................. 23 
Software Reset............................................................................. 23 
Daisy-Chain Mode ..................................................................... 23 
Power-On Reset.......................................................................... 24 
Break-Before-Make Switching.................................................. 25 
Trench Isolation.......................................................................... 25 
Applications Information .............................................................. 26 
Power Supply Rails ..................................................................... 26 
Power Supply Recommendations............................................. 26 
Register Summary .......................................................................... 27 
Register Details ............................................................................... 28 
Switch Data Register .................................................................. 28 
Error Configuration Register.................................................... 28 
Error Flags Register.................................................................... 29 
Burst Enable Register................................................................. 29 
Software Reset Register ............................................................. 29 
Outline Dimensions ....................................................................... 30 
Ordering Guide .......................................................................... 30 
Rev. 0 | Page 2 of 30



Analog Devices ADGS5414
Data Sheet
ADGS5414
SPECIFICATIONS
±15 V DUAL SUPPLY
Digital logic voltage (VDD) = +15 V ± 10%, negative supply voltage (VSS) = −15 V ± 10%, positive supply voltage (VL) = 2.7 V to 5.5 V,
GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
+25°C −40°C to +85°C −40°C to +125°C Unit
VDD to VSS
V
13.5 Ω typ
On-Resistance Match Between Channels,
∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
15
0.3
0.8
1.8
2.2
±0.1
18
1.3
2.6
22
1.4
3
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
Drain Off Leakage, ID (Off )
±0.25 ±1
±0.1
±7
nA max
nA typ
±0.25 ±1
±7
nA max
Channel On Leakage, ID (On), IS (On)
±0.15
nA typ
±0.4 ±2 ±14 nA max
DIGITAL OUTPUT
Output Voltage
Low, VOL
0.4 V max
0.2 V max
Output Current, Low (IOL) or High (IOH)
0.001
μA typ
Digital Output Capacitance, COUT
DIGITAL INPUTS
Input Voltage
High, VINH
Low, VINL
Input Current, Low (IINL) or High (IINH)
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS
tON
4
0.001
4
410
±0.1 μA max
pF typ
2 V min
1.35 V min
0.8 V max
0.8 V max
μA typ
±0.1 μA max
pF typ
ns typ
tOFF
Break-Before-Make Time Delay, tD
Charge Injection, QINJ
420 515
135
140 185
260
250
125
515
195
210
ns max
ns typ
ns max
ns typ
ns min
pC typ
Test Conditions/Comments
Source voltage (VS) = ±10 V,
IS = −10 mA; see Figure 29
VDD = +13.5 V, VSS = −13.5 V
VS = ±10 V, source current
(IS) = −10 mA
VS = ±10 V, IS = −10 mA
VDD = +16.5 V, VSS = −16.5 V
VS = ±10 V, VD = ±10 V;
see Figure 32
VS = ±10 V, VD = ±10 V;
see Figure 32
VS = VD = ±10 V; see Figure 28
Sink current (ISINK) = 5 mA
ISINK = 1 mA
Output voltage (VOUT) =
ground voltage (VGND)or VL
3.3 V < VL ≤ 5.5 V
2.7 V ≤ VL ≤ 3.3 V
3.3 V < VL ≤ 5.5 V
2.7 V ≤ VL ≤ 3.3 V
VIN = VGND or VL
Load resistance (RL) = 300 Ω,
load capacitance (CL) = 35 pF
VS = 10 V; see Figure 37
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 37
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 10 V; see Figure 36
VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 38
Rev. 0 | Page 3 of 30







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