N-channel MOSFET. PSMN1R5-25YL Datasheet

PSMN1R5-25YL MOSFET. Datasheet pdf. Equivalent

PSMN1R5-25YL Datasheet
Recommendation PSMN1R5-25YL Datasheet
Part PSMN1R5-25YL
Description N-channel MOSFET
Feature PSMN1R5-25YL; PSMN1R5-25YL N-channel TrenchMOS logic level FET Rev. 01 — 16 June 2009 Product data sheet 1. Prod.
Manufacture nexperia
Datasheet
Download PSMN1R5-25YL Datasheet




nexperia PSMN1R5-25YL
PSMN1R5-25YL
N-channel TrenchMOS logic level FET
Rev. 01 — 16 June 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
1.2 Features and benefits
„ High efficiency due to low switching
and conduction losses
„ Suitable for logic level gate drive
sources
1.3 Applications
„ Class-D amplifiers
„ DC-to-DC converters
„ Motor control
„ Server power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
VDS drain-source voltage Tj 25 °C; Tj 150 °C
- - 25 V
ID drain current
Tmb = 25 °C; VGS = 10 V; [1] - - 100 A
see Figure 1;
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
- - 109 W
Dynamic characteristics
QGD
gate-drain charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 14;
see Figure 15
- 9.2 - nC
QG(tot) total gate charge
VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 14;
see Figure 15
- 36 - nC
Static characteristics
RDSon drain-source
on-state resistance
VGS = 10 V; ID = 15 A;
Tj = 25 °C
- 1.13 1.5 m
[1] Continuous current is limited by package.



nexperia PSMN1R5-25YL
Nexperia
PSMN1R5-25YL
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
1S
source
2S
source
3S
source
4G
gate
mb D
mounting base; connected to
drain
3. Ordering information
Simplified outline
mb
1234
SOT669
(LFPAK)
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
Description
PSMN1R5-25YL LFPAK
plastic single-ended surface-mounted package (LFPAK); 4 leads
4. Limiting values
Version
SOT669
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM peak drain current
Ptot total power dissipation
Tstg storage temperature
Tj junction temperature
Source-drain diode
Conditions
Tj 25 °C; Tj 150 °C
Tj 25 °C; Tj 150 °C; RGS = 20 k
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
tp 10 µs; pulsed; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
Min Max Unit
- 25 V
- 25 V
-20 20
V
[1] -
100 A
[1] -
100 A
- 815 A
- 109 W
-55 150 °C
-55 150 °C
IS source current
ISM peak source current
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source avalanche
energy
Tmb = 25 °C;
tp 10 µs; pulsed; Tmb = 25 °C
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup 25 V;
RGS = 50 ; unclamped
[1]
-
-
-
100 A
815 A
290 mJ
[1] Continuous current is limited by package.
PSMN1R5-25YL_1
Product data sheet
Rev. 01 — 16 June 2009
© Nexperia B.V. 2017. All rights reserved
2 of 13



nexperia PSMN1R5-25YL
Nexperia
PSMN1R5-25YL
N-channel TrenchMOS logic level FET
250
ID
(A)
200
150
100
(1)
50
0
0 50
003aac900
100 150 200
Tmb (°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
104
ID
(A)
103 Limit RDSon = VDS / ID
102
10
(1)
1
10-1
1
120
Pder
(%)
80
03aa15
40
0
0 50 100 150 200
Tmb (°C)
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aac901
10 μs
DC
10
100 μs
1 ms
10 ms
100 ms
VDS (V)
102
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN1R5-25YL_1
Product data sheet
Rev. 01 — 16 June 2009
© Nexperia B.V. 2017. All rights reserved
3 of 13







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