N-channel MOSFET. PSMN1R5-40YSD Datasheet

PSMN1R5-40YSD MOSFET. Datasheet pdf. Equivalent

PSMN1R5-40YSD Datasheet
Recommendation PSMN1R5-40YSD Datasheet
Part PSMN1R5-40YSD
Description N-channel MOSFET
Feature PSMN1R5-40YSD; PSMN1R5-40YSD 15 August 2018 Objective data sheet 1. Quick reference data Table 1. Quick referenc.
Manufacture nexperia
Datasheet
Download PSMN1R5-40YSD Datasheet




nexperia PSMN1R5-40YSD
PSMN1R5-40YSD
15 August 2018
Objective data sheet
1. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD
QG(tot)
gate-drain charge
total gate charge
Conditions
25 °C ≤ Tj ≤ 175 °C
VGS = 10 V; Tmb = 25 °C; Fig. 2
Tmb = 25 °C; Fig. 1
VGS = 10 V; ID = 25 A; Tj = 25 °C
ID = 25 A; VDS = 20 V; VGS = 10 V;
Fig. 8; Fig. 9
Min Typ Max Unit
- - 40 V
[1] - - 190 A
- - 238 W
-55 -
175 °C
- [tbd] 1.5 mΩ
- 10 20 nC
- 71 99 nC
[1] 190A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,
thermal design and operating temperature.
2. Pinning information
Table 2. Pinning information
Pin Symbol Description
Simplified outline
1 S source
mb
2 S source
3 S source
4 G gate
mb D
mounting base; connected to
drain
1234
LFPAK56; Power-
SO8 (SOT669)
Graphic symbol
D
G
mbb076 S
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
PSMN1R5-40YSD
LFPAK56;
Power-SO8
Description
plastic, single-ended surface-mounted package; 4 terminals
Version
SOT669



nexperia PSMN1R5-40YSD
Nexperia
PSMN1R5-40YSD
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS
VDSM
drain-source voltage
peak drain-source
voltage
25 °C ≤ Tj ≤ 175 °C
tp = 20 ns; f = 500 kHz; EDS(AL) = 200 nJ;
pulsed
VDGR
VGS
Ptot
ID
IDM
Tstg
Tj
Tsld(M)
drain-gate voltage
gate-source voltage
total power dissipation
drain current
peak drain current
storage temperature
junction temperature
peak soldering
temperature
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ
Tj ≤ 175 °C
Tmb = 25 °C; Fig. 1
VGS = 10 V; Tmb = 25 °C; Fig. 2
VGS = 10 V; Tmb = 100 °C; Fig. 2
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-
ID = 71.2 A; Vsup ≤ 40 V; RGS = 50 Ω;
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;
tp = 230 µs
ID = 25 A; Vsup ≤ 40 V; RGS = 50 Ω;
VGS = 10 V; Tj(init) = 25 °C; unclamped;
tp = 2310 µs
IAS non-repetitive avalanche Vsup = 40 V; VGS = 10 V; Tj(init) = 25 °C;
current
RGS = 50 Ω
[1]
[2]
[2]
Min Max Unit
- 40 V
- 45 V
- 40 V
-20 20
V
- 238 W
- 190 A
- 190 A
- 1080 A
-55 175 °C
-55 175 °C
- 260 °C
- 190 A
- 1080 A
- 426 mJ
- 1502 mJ
- 190 A
[1] 190A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,
thermal design and operating temperature.
[2] Protected by 100% test
PSMN1R5-40YSD
Objective data sheet
All information provided in this document is subject to legal disclaimers.
15 August 2018
© Nexperia B.V. 2018. All rights reserved
2 / 11



nexperia PSMN1R5-40YSD
Nexperia
PSMN1R5-40YSD
120
Pder
(%)
80
03aa16
40
0
0 50 100 150 200
Tmb (°C)
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-mb)
thermal resistance from
junction to mounting
base
Rth(j-a)
thermal resistance from Fig. 3
junction to ambient
Fig. 4
300
ID
(A)
250
aaa-028907
200
(1)
150
100
50
0
0 25 50 75 100 125 150 175 200
Tmb (°C)
VGS ≥ 10 V
(1) 190A continuous current has been successfully
demonstrated during application tests. Practically
the current will be limited by PCB, thermal design
and operating temperature.
Fig. 2. Continuous drain current as a function of
mounting base temperature
Min Typ Max Unit
- 0.56 0.63 K/W
- 42 - K/W
- 85 - K/W
Fig. 3.
aaa-027933
Copper area 25.4 mm square; 70 µm thick on FR4
board
Fig. 4.
PCB layout for thermal resistance from junction
to ambient
aaa-027935
70 µm thick copper on FR4 board
PCB layout with minimum footprint for thermal
resistance from junction to ambient
PSMN1R5-40YSD
Objective data sheet
All information provided in this document is subject to legal disclaimers.
15 August 2018
© Nexperia B.V. 2018. All rights reserved
3 / 11







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