DatasheetsPDF.com

Energy SiP/Module. ATSAMB11ZR Datasheet

DatasheetsPDF.com

Energy SiP/Module. ATSAMB11ZR Datasheet






ATSAMB11ZR SiP/Module. Datasheet pdf. Equivalent




ATSAMB11ZR SiP/Module. Datasheet pdf. Equivalent





Part

ATSAMB11ZR

Description

Ultra-Low Power Bluetooth Low Energy SiP/Module



Feature


ATSAMB11XR/ZR Ultra-Low Power Bluetooth Low Energy SiP/Module Introduction Th e ATSAMB11-XR2100A is an ultra-low powe r Bluetooth Low Energy (BLE) 5.0 System in a Package (SiP) with Integrated MCU , transceiver, modem, MAC, PA, Transmit /Receive (T/R) switch, and Power Manage ment Unit (PMU). It is a standalone Cor tex® -M0 applications processor with e mbedded Flash memory.
Manufacture

Microchip

Datasheet
Download ATSAMB11ZR Datasheet


Microchip ATSAMB11ZR

ATSAMB11ZR; and BLE connectivity. The Bluetooth SIG -qualified Bluetooth Low Energy protoco l stack is stored in a dedicated ROM. T he firmware includes L2CAP service laye r protocols, Security Manager, Attribut e protocol (ATT), Generic Attribute Pro file (GATT), and the Generic Access Pro file (GAP). Additionally, example appli cations are available for application p rofiles such as pr.


Microchip ATSAMB11ZR

oximity, thermometer, heart rate and blo od pressure, and many others. The ATSAM B11-XR2100A provides a compact footprin t and various embedded features, such a s a 26 MHz crystal oscillator. The ATSA MB11-ZR210CA is a fully certified modul e that contains the ATS .


Microchip ATSAMB11ZR

.

Part

ATSAMB11ZR

Description

Ultra-Low Power Bluetooth Low Energy SiP/Module



Feature


ATSAMB11XR/ZR Ultra-Low Power Bluetooth Low Energy SiP/Module Introduction Th e ATSAMB11-XR2100A is an ultra-low powe r Bluetooth Low Energy (BLE) 5.0 System in a Package (SiP) with Integrated MCU , transceiver, modem, MAC, PA, Transmit /Receive (T/R) switch, and Power Manage ment Unit (PMU). It is a standalone Cor tex® -M0 applications processor with e mbedded Flash memory.
Manufacture

Microchip

Datasheet
Download ATSAMB11ZR Datasheet




 ATSAMB11ZR
ATSAMB11XR/ZR
Ultra-Low Power Bluetooth® Low Energy SiP/Module
Introduction
The ATSAMB11-XR2100A is an ultra-low power Bluetooth Low Energy (BLE) 5.0 System in a Package
(SiP) with Integrated MCU, transceiver, modem, MAC, PA, Transmit/Receive (T/R) switch, and Power
Management Unit (PMU). It is a standalone Cortex® -M0 applications processor with embedded Flash
memory and BLE connectivity.
The Bluetooth SIG-qualified Bluetooth Low Energy protocol stack is stored in a dedicated ROM. The
firmware includes L2CAP service layer protocols, Security Manager, Attribute protocol (ATT), Generic
Attribute Profile (GATT), and the Generic Access Profile (GAP). Additionally, example applications are
available for application profiles such as proximity, thermometer, heart rate and blood pressure, and many
others.
The ATSAMB11-XR2100A provides a compact footprint and various embedded features, such as a 26
MHz crystal oscillator.
The ATSAMB11-ZR210CA is a fully certified module that contains the ATSAMB11-XR2100A and all
external RF circuitry required, including a ceramic high-gain antenna. The user simply places the module
into their PCB and provides power with a 32.768 kHz Real-Time Clock (RTC) or crystal, and an I/O path.
Microchip BluSDK Smart offers a comprehensive set of tools and reference applications for several
Bluetooth SIG defined profiles and a custom profile. The BluSDK Smart will help the user quickly
evaluate, design and develop BLE products with the ATSAMB11-XR2100A and ATSAMB11-ZR210CA.
The ATSAMB11-XR2100A and associated ATSAMB11-ZR210CA module have passed the Bluetooth SIG
certification for interoperability with the Bluetooth Low Energy 5.0 specification QDID: 117593.
Features
• 2.4 GHz Transceiver and Modem:
– -92.5 dBm receiver sensitivity
– -55 dBm to +3.5 dBm programmable TX output power
– Integrated T/R switch
– Single wire antenna connection (ATSAMB11-XR2100A)
– Incorporated chip antenna (ATSAMB11-ZR210CA)
• Processor Features:
– ARM® Cortex®-M0 32-bit processor
– Serial Wire Debug (SWD) interface
– Four-channel Direct Memory Access (DMA) controller
– Watchdog Timer
• Memory:
© 2019 Microchip Technology Inc.
Datasheet
DS70005342D-page 1




 ATSAMB11ZR
ATSAMB11XR/ZR
– 128 KB embedded Random Access Memory (RAM)
– 128 KB embedded ROM
– 256 KB stacked Flash memory
• Hardware Security Accelerators:
– Advanced Encryption Standard (AES)-128
– Secure Hash Algorithm (SHA)-256
• Peripherals:
– 23 digital and 4 mixed-signal General Purpose Input Outputs (GPIOs) with 96 kOhm internal
programmable pull-up or down resistors and retention capability, and one wake-up GPIO with 96
kOhm internal pull-up resistor
– Two Serial Peripheral Interface (SPI) Master/Slave
– Two Inter-Integrated Circuit (I2C) Master/Slave
– Two UART
– One SPI Flash interface (used for accessing the internal stacked Flash)
– Three-axis quadrature decoder
– Four Pulse Width Modulation (PWM) channels
– Three General Purpose Timers and one Always-On (AON) sleep Timer
– 4-channel, 11-bit Analog-to-Digital Converter (ADC)
• Clock:
– Integrated 26 MHz RC oscillator
– Integrated 2 MHz RC oscillator
– 26 MHz crystal oscillator (XO)
– 32.768 kHz Real Time Clock crystal oscillator (RTC XO)
• Ultra-Low Power:
– 2.03 µA sleep current
– 4.18 mA peak TX current (1)
– 5.26 mA peak RX current
– 16.4 µA average advertisement current (three channels, 1s interval) (2)
• Integrated Power Management:
– 2.3V to 4.3V battery voltage range
– 2.3V to 3.6V input range for I/O (limited by Flash memory)
– Fully integrated Buck DC/DC converter
• Temperature Range:
– -40°C to 85°C
• Package:
– 49-pin FLGA SiP package 5.50 mm x 4.50 mm
– 35-pin module package 10.541 mm x 7.503 mm
– BT SIG QDID: 117593
Note: 
1. TX output power - 0 dBm.
2. Advertisement channels - 3 ; Advertising interval - 1 second ; Advertising event type - Connectable
undirected; Advertisement data payload size - 31 octets.
© 2019 Microchip Technology Inc.
Datasheet
DS70005342D-page 2




 ATSAMB11ZR
ATSAMB11XR/ZR
Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Ordering Information..................................................................................................9
2. Package Information................................................................................................10
3. Block Diagram..........................................................................................................11
4. Pinout Information................................................................................................... 12
5. Device States.......................................................................................................... 17
5.1. Description of Device States...................................................................................................... 17
5.2. Power Sequences...................................................................................................................... 17
5.3. Digital and Mixed-Signal I/O Pin Behavior during Power-Up Sequences.................................. 18
6. Processor Architecture............................................................................................ 20
6.1. ARM Subsystem.........................................................................................................................20
6.2. Cortex M0 Peripherals................................................................................................................21
6.3. Nested Vector Interrupt Controller..............................................................................................22
7. Memory Subsystem.................................................................................................25
7.1. Shared Instruction and Data Memory.........................................................................................25
7.2. ROM........................................................................................................................................... 25
7.3. BLE Retention Memory.............................................................................................................. 25
7.4. Flash Memory.............................................................................................................................25
7.5. Non-Volatile Memory.................................................................................................................. 26
8. Bluetooth Low Energy Subsystem...........................................................................43
8.1. BLE Core....................................................................................................................................43
8.2. Features..................................................................................................................................... 43
8.3. BLE Radio.................................................................................................................................. 43
8.4. Microchip BluSDK Smart............................................................................................................44
9. Clocking...................................................................................................................45
9.1. Overview.................................................................................................................................... 45
9.2. 26 MHz Crystal Oscillator (XO).................................................................................................. 45
9.3. 32.768 kHz RTC Crystal Oscillator (RTC XO)............................................................................46
9.4. 2 MHz Integrated RC Oscillator..................................................................................................51
9.5. Clock Settings for Critical Sections............................................................................................ 52
9.6. Peripheral Clock Configuration...................................................................................................52
9.7. AON Sleep Timer Clock Configuration....................................................................................... 53
9.8. Clock Output...............................................................................................................................53
9.9. Register Summary......................................................................................................................56
© 2019 Microchip Technology Inc.
Datasheet
DS70005342D-page 3






Recommended third-party ATSAMB11ZR Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)