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Controlled Potentiometer. ISL22429 Datasheet

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Controlled Potentiometer. ISL22429 Datasheet






ISL22429 Potentiometer. Datasheet pdf. Equivalent




ISL22429 Potentiometer. Datasheet pdf. Equivalent





Part

ISL22429

Description

Dual Digitally Controlled Potentiometer



Feature


ISL22429 OBSOLETE PRODUCT POSSIBLE SUBS TITUTE PRODUCT ISL22426 Dual Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, SPI® Bus, 128 Taps, Wiper Only DATASHEET FN6332 Rev 2.00 May 28, 2009 The ISL22429 integrates t wo digitally controlled potentiometers (DCP) and non-volatile memory on a mono lithic CMOS integrated circuit. The dig itally controlled pot.
Manufacture

Renesas

Datasheet
Download ISL22429 Datasheet


Renesas ISL22429

ISL22429; entiometers are implemented with a combi nation of resistor elements and CMOS sw itches. The position of the wipers are controlled by the user through the SPI serial interface. Each potentiometer ha s an associated volatile Wiper Register (WR) and a non-volatile Initial Value Register (IVR) that can be directly wri tten to and read by the user. The conte nts of the WR cont.


Renesas ISL22429

rols the position of the wiper. At power -up the device recalls the contents of the DCP’s IVR to the corresponding WR . The DCP can be used as a voltage divi der in a wide variety of applications i ncluding control, parameter adjustments , AC measurement and s .


Renesas ISL22429

.

Part

ISL22429

Description

Dual Digitally Controlled Potentiometer



Feature


ISL22429 OBSOLETE PRODUCT POSSIBLE SUBS TITUTE PRODUCT ISL22426 Dual Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, SPI® Bus, 128 Taps, Wiper Only DATASHEET FN6332 Rev 2.00 May 28, 2009 The ISL22429 integrates t wo digitally controlled potentiometers (DCP) and non-volatile memory on a mono lithic CMOS integrated circuit. The dig itally controlled pot.
Manufacture

Renesas

Datasheet
Download ISL22429 Datasheet




 ISL22429
ISL22429
OBSOLETE PRODUCT
POSSIBLE SUBSTITUTE PRODUCT
ISL22426
Dual Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, SPI®
Bus, 128 Taps, Wiper Only
DATASHEET
FN6332
Rev 2.00
May 28, 2009
The ISL22429 integrates two digitally controlled
potentiometers (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI serial interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the
DCP’s IVR to the corresponding WR.
The DCP can be used as a voltage divider in a wide variety
of applications including control, parameter adjustments, AC
measurement and signal processing.
Pinout
NC
SCK
SDO
GND
RW1
ISL22429
(10 LD MSOP)
TOP VIEW
1 10
29
38
47
56
RW0
SHDN
VCC
SDI
CS
Features
• Two potentiometers in one package
• 128 resistor taps
• SPI serial interface
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T < +55°C
• 10 Lead MSOP
• Pb-free (RoHS compliant)
Ordering Information
PART NUMBER
(Note)
ISL22429UFU10Z*
PART
MARKING
429UZ
RESISTANCE OPTION
(k)
50
TEMP. RANGE
(°C)
-40 to +125
PACKAGE
(Pb-free)
10 Ld MSOP
PKG. DWG. #
M10.118
ISL22429WFU10Z*
429WZ
10
-40 to +125
10 Ld MSOP
M10.118
*Add “-T” or “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN6332 Rev 2.00
May 28, 2009
Page 1 of 13




 ISL22429
ISL22429
Block Diagram
SCK
SDI
SDO
CS
SPI
INTERFACE
VCC
POWER-UP
INTERFACE,
CONTROL
AND STATUS
LOGIC
SHDN
NON-
VOLATILE
REGISTERS
WR1
VCC
RW1
VCC
WR0
RW0
Pin Descriptions
MSOP PIN
1
2
3
4
5
6
7
8
9
10
SYMBOL
NC
SCK
SDO
GND
RW1
CS
SDI
VCC
SHDN
RW0
GND
DESCRIPTION
SPI interface clock input
Open drain SPI interface data output
Device ground pin
“Wiper” terminal of DCP1
Chip Select active low input
SPI interface data input
Power supply pin
Shutdown active low input
“Wiper” terminal of DCP0
FN6332 Rev 2.00
May 28, 2009
Page 2 of 13




 ISL22429
ISL22429
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP pin with Respect to GND . . . . . . . -0.3V to VCC
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 2) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD Rating
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (°C/W)
10 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
120
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
VCC Voltage for DCP Operation . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -3mA to 3mA
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications
Over recommended operating conditions unless otherwise stated. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested.
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (Note 3) MAX
UNIT
RTOTAL End-to-End Resistance
W option
U option
10 k
50 k
End-to-End Resistance Tolerance
W and U option
-20 +20 %
End-to-End Temperature Coefficient W option
±50 ppm/°C
(Note 13)
U option
±80 ppm/°C
(Note 13)
RW
(Note 13)
CW
(Note 13)
Wiper Resistance
Wiper Capacitance
VCC = 3.3V @ +25°C,
wiper current = VCC/RTOTAL
70
25 pF
VOLTAGE DIVIDER MODE (measured at RWi, unloaded; i = 0 or 1)
INL Integral Non-linearity
(Note 8)
Monotonic over all tap positions
-1
1 LSB
(Note 4)
DNL
Differential Non-linearity
(Note 7)
Monotonic over all tap positions
-0.5
0.5 LSB
(Note 4)
ZSerror Zero-scale Error
(Note 5)
W option
0 1 5 LSB
(Note 4)
U option
0 0.5 2 LSB
(Note 4)
FSerror Full-scale Error
(Note 6)
W option
-5 -1 0 LSB
(Note 4)
U option
-2 -1
0 LSB
(Note 4)
VMATCH DCP to DCP Matching
(Note 9)
Any two DCPs at the same tap position
-2
2 LSB
(Note 4)
TCV Ratiometric Temperature Coefficient DCP register set to 40 hex
(Note 10)
±4 ppm/°C
FN6332 Rev 2.00
May 28, 2009
Page 3 of 13



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