ZL40235 Datasheet (data sheet) PDF





ZL40235 Datasheet, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

ZL40235   ZL40235  

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Data Sheet ZL40235 Low Skew, Low Addit ive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanou t Buffer with one LVCMOS output Featur es • 3 to 1 input Multiplexer: Two in puts accept any differential (LVPECL, H CSL, LVDS, SSTL, CML, LVCMOS) or a sing le ended signal and the third input acc epts a crystal or a single ended signal • Five differential LVPECL/LVDS/HCSL outputs and one LVCMOS output •

ZL40235 Datasheet, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

ZL40235   ZL40235  
Ultra-low additive jitter: 24fs (integr ation band 12kHz to 20MHz at 625MHz clo ck frequency) • Supports clock freque ncies from 0 to 1.6GHz • Supports 2.5 V or 3.3V power supplies for LVPECL, LV DS or HCSL outputs • Supports 1.5V, 1 ,8V, 2.5V or 3.3V power supplies for LV CMOS output • Embedded Low Drop Out ( LDO) Voltage regulator provides superio r Power Supply Noise Rejection • Max








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