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54AC11027
TRIPLE 3-INPUT POSITIVE-NOR GATES
Description
ăą 54AC11027, 74AC11027 TRIPLE 3ĆINPUT POSITIVEĆNOR GATES Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip C...
Texas Instruments
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