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54ACT11109
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
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54ACT11109, 74ACT11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCAS451 – FEBRUARY 1987 – REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process 500...
Texas Instruments
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