n-channel JFET. FN4117A Datasheet

FN4117A JFET. Datasheet pdf. Equivalent

Part FN4117A
Description n-channel JFET
Feature n-channel JFETs designed for • • • • Ultra-High Input Impedance Amplifiers Electrometers pH Meters S.
Manufacture Siliconix
Datasheet
Download FN4117A Datasheet



FN4117A
n-channel JFETs
designed for
Ultra-High Input
Impedance Amplifiers
Electrometers
pH Meters
Smoke Detectors
Intrusion Alarms
H
Siliconix
Performance Curves NT
See Section 4
BENEFITS
• Low Power
<loSS 90 p.A (2N4117)
• Minimum Circuit Loading
<IGSS 1 pA (2N4117A Series)
*ABSOLUTE MAXIMUM RATINGS (25°C)
Gate-Drain or Gate-Source Voltage (Note 1) .....•.. -40 V
Gate-Current ............................... 50mA
Total Device Dissipation
(Derate 2 mWrC to 175°C) ................ 300mW
Storage Temperature Range ............ _. -65 to +175°C
Lead Temperature
(1/16" from case for 10 seconds). " ........... 255°C
TO-72
See Section 6
"4:
~G ~
0
s
*ELECTRICAL CHARACTERISTICS (25°C unless otherwise noted)
Characteristic
1
::2
S
-3 T
-4 A
T
-5
-6
I
C
7
-8 D
y
9N
-
A
M
10 I
-c
11
IGSS
IGSS
BVGSS
VGS(off)
IDSS
gls
gas
Ciss
Crss
Gate Reverse Current
2N4117 Senes Only
FN4117
Gate Reverse Current
2N4117A Series Only
FN4117A
Gate-5ource Breakdown Voltage
Gate·Source Cutoff Voltage
Saturation Dram Current
(Note 2)
FN4117A
Common-Source Forward
Transconductance (Note 2)
Common-Source Output
Conductance
Common-Source Input
Capabltance
Common-Source Reverse Transfer
Capacitance
2N4117/A
FN4117/A
Min Max
-10
-25
-1
-2.5
-40
-0.6 -1.8
0.03 0.09
0.015
70 210
3
3
1.5
2N4118
2N4118A
Min Max
-10
-25
-1
-2.5
-40
-1 -3
2N4119
2N4119A
Min Max
-10
-25
-1
-25
-40
-2 -6
Unit
pA
nA
pA
nA
V
Test Conditions
VGS = -20 V. VDS = 0
VGS = -20 V. VDS = 0
IG=-lI'A.VDS=O
VDS = 10 V. ID = 1 nA
150°C
150°C
008 0.24 0.20 060 mA VDS= 10V.VGS=0
80 250
5
3
1.5
100 330
I'mho
10
VDS=1OV.VGS=0
3
pF
1.5
f ~ 1 kHz
1= 1 MHz
*JEDEC registered data.
NOTES:
1. Due to symmetrical geometry. these Units may be operated with source and drain leads Interchanged.
2. This parameter IS measured dUring a 2 ms Interval 100 ms after power is applied. (Not a JEDEC condition.)
NT
Siliconix
3-9





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