RANDOM-ACCESS MEMORY. TMS664814 Datasheet

TMS664814 MEMORY. Datasheet pdf. Equivalent

Part TMS664814
Description SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
Feature TMS664414, TMS664814, TMS664164 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK .
Manufacture etcTI
Total Page 30 Pages
Datasheet
Download TMS664814 Datasheet



TMS664814
TMS664414, TMS664814, TMS664164
4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS695A – APRIL 1998 – REVISED JULY 1998
D Organization . . .
1 048 576 x 16 Bits x 4 Banks
2 097 152 x 8 Bits x 4 Banks
4 194 304 x 4 Bits x 4 Banks
D 3.3-V Power Supply (± 10% Tolerance)
D Four Banks for On-Chip Interleaving for
x8/x16 (Gapless Access) Depending on
Organizations
D High Bandwidth – Up to 125-MHz Data
Rates
D Burst Length Programmable to 1, 2, 4, 8
D Programmable Output Sequence – Serial or
Interleave
D Chip-Select and Clock-Enable for
Enhanced-System Interfacing
D Cycle-by-Cycle DQ Bus Mask Capability
D Only x16 SDRAM Configuration Supports
Upper-/Lower-Byte Masking Control
D Programmable CAS Latency From Column
Address
D Performance Ranges:
D Pipeline Architecture (Single-Cycle
Architecture)
D Single Write/Read Burst
D Self-Refresh Capability (Every 16 ms)
D Low-Noise, Low-Voltage
Transistor-Transistor Logic (LVTTL)
Interface
D Power-Down Mode
D Compatible With JEDEC Standards
D 16K RAS-Only Refresh (Total for All Banks)
D 4K Auto Refresh (Total for All Banks)/64 ms
D Automatic Precharge and Controlled
Precharge
D Burst Interruptions Supported:
– Read Interruption
– Write Interruption
– Precharge Interruption
D Support Clock-Suspend Operation (Hold
Command)
D Intel PC100 Compliant (-8 and -8A parts)
’664xx4-8
’664xx4-8A
’664xx4-10
SYNCHRONOUS
CLOCK CYLE
TIME
tCK3
8 ns
tCK2
10 ns
8 ns 15 ns
10 ns
15 ns
ACCESS TIME
CLOCK TO
OUTPUT
tAC3
6 ns
tAC2
6 ns
6 ns 7.5 ns
7.5 ns 7.5 ns
REFRESH
INTERVAL
tREF
64 ms
64 ms
64 ms
description
The TMS664xx4 series are 67 108 864-bit synchronous dynamic random-access memory (SDRAM) devices
which are organized as follow:
D Four banks of 1 048 576 words with 16 bits per word
D Four banks of 2 097152 words with 8 bits per word
D Four banks of 4 194304 words with 4 bits per word
All inputs and outputs of the TMS664xx4 series are compatible with the LVTTL interface.
The SDRAM employs state-of-the-art technology for high-performance, reliability, and low power. All inputs and
outputs are synchronized with the CLK input to simplify system design and to enhance use with high-speed
microprocessors and caches.
The TMS664xx4 SDRAM is available in a 400-mil, 54-pin surface-mount thin small-outline package (TSOP)
(DGE suffix).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
1



TMS664814
TMS664414, TMS664814, TMS664164
4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS695A – APRIL 1998 – REVISED JULY 1998
TMS664xx4 (LVTTL)
DGE PACKAGE
(TOP VIEW)
VCC
VCC
VCC
1
DQ0
DQ0
NC 2
VCCQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VCCQ
DQ5
DQ6
VSSQ
DQ7
VCC
DQML
W
CAS
RAS
CS
A13, BS0
A12, BS1
A10, AP
A0
A1
A2
A3
VCC
VCCQ
NC
DQ1
VSSQ
NC
DQ2
VCCQ
NC
DQ3
VSSQ
NC
VCC
NC
W
CAS
RAS
CS
A13, BS0
A12, BS1
A10, AP
A0
A1
A2
A3
VCC
VCCQ
NC
DQ0
VSSQ
NC
NC
VCCQ
NC
DQ1
VSSQ
NC
VCC
NC
W
CAS
RAS
CS
A13, BS0
A12, BS1
A10, AP
A0
A1
A2
A3
VCC
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
4M x 16
8M x 8
16M x 4
54-Pin
Plastic
TSOP–II
(Pitch = 0.8 mm)
54 VSS
53 NC
52 VSSQ
51 NC
50 DQ3
49 VCCQ
48 NC
47 NC
46 VSSQ
45 NC
44 DQ2
43 VCCQ
42 NC
41 VSS
40 NC
39 DQM
38 CLK
37 CKE
36 NC
35 A11
34 A9
33 A8
32 A7
31 A6
30 A5
29 A4
28 VSS
VSS
DQ7
VSSQ
NC
DQ6
VCCQ
NC
DQ5
VSSQ
NC
DQ4
VCCQ
NC
VSS
NC
DQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
VSS
VSS
DQ15
VSSQ
DQ14
DQ13
VCCQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VCCQ
DQ8
VSS
NC
DQMU
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
VSS
ROW
ADDR
COL
ADDR
x4 A0 – A13 A0 – A9
x8 A0 – A13 A0 – A8
x16 A0 – A13 A0 – A7
A10 Auto Precharge
BANKS
4
BANK-SELECT
ADDRESS
A13 – A12
2 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443





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