mmWave Sensor. IWR6843 Datasheet

IWR6843 Sensor. Datasheet pdf. Equivalent

Part IWR6843
Description Single-Chip 60 to 64-GHz mmWave Sensor
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IWR6843
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Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
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IWR6843
SWRS219B – OCTOBER 2018 – REVISED SEPTEMBER 2019
IWR6843 Single-Chip 60- to 64-GHz mmWave Sensor
1 Device Overview
1.1 Features
1
• FMCW transceiver
– Integrated PLL, transmitter, receiver, Baseband,
and A2D
– 60- to 64-GHz coverage with 4-GHz continuous
bandwidth
– Four receive channels
– Three transmit channels
– Supports 6-bit phase shifter for TX Beam
forming
– Ultra-accurate chirp engine based on fractional-
N PLL
– TX power: 10 dBm
– RX noise figure:
– 14 dB
– Phase noise at 1 MHz:
– –92 dBc/Hz
• Built-in calibration and self-test
– ARM® Cortex®-R4F-based radio control system
– Built-in firmware (ROM)
– Self-calibrating system across frequency and
temperature
• C674x DSP for advanced signal processing
• Hardware accelerator for FFT, filtering, and CFAR
processing
• Memory compression
• ARM-R4F microcontroller for object detection, and
interface control
– Supports autonomous mode (loading user
application from QSPI flash memory)
1.2 Applications
Industrial sensor for measuring range, velocity,
and angle
Building automation
Displacement sensing
Gesture
Robotics
Traffic monitoring
• Internal memory with ECC
– 1.75 MB, divided into MSS program RAM (512
KB), MSS data RAM (192 KB), DSP L1 RAM
(64KB) and L2 RAM (256 KB), and L3 radar
data cube RAM (768 KB)
– Technical reference manual includes allowed
size modifications
• Other interfaces available to user application
– Up to 6 ADC channels (low sample rate
monitoring)
– Up to 2 SPI ports
– Up to 2 UARTs
– 1 CAN-FD interface
– I2C
– GPIOs
– 2 lane LVDS interface for raw ADC data and
debug instrumentation
• SIL-2 targeted
• Power management
– Built-in LDO network for enhanced PSRR
– I/Os support dual voltage 3.3 V/1.8 V
• Clock source
– 40.0 MHz crystal with internal oscillator
– Supports external oscillator at 40 MHz
– Supports externally driven clock (square/sine) at
40 MHz
• Easy hardware design
– 0.65-mm pitch, 161-pin 10.4 mm × 10.4 mm flip
chip BGA package for easy assembly and low-
cost PCB design
– Small solution size
• Operating conditions:
– Junction temperature range of –40ºC to 105ºC
Proximity and position sensing
Security and surveillance
Factory automation safety guards
People counting
Motion detection
Occupancy detection
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.



IWR6843
IWR6843
SWRS219B – OCTOBER 2018 – REVISED SEPTEMBER 2019
www.ti.com
1.3 Description
The IWR6843 is an integrated single chip mmWave sensor based on FMCW radar technology capable of
operation in the 60-GHz to 64-GHz band. It is built with TI’s low power 45-nm RFCMOS process and
enables unprecedented levels of integration in an extremely small form factor. The IWR6843 is an ideal
solution for low power, self-monitored, ultra-accurate radar systems in the industrial space.
PART NUMBER
Device Information(1)
PACKAGE
XI6843AQGABL
FCBGA (161)
XI6843AAQGALB
FCBGA (209)
(1) For more information, see Section 9, Mechanical, Packaging, and Orderable Information.
BODY SIZE
10.4 mm × 10.4 mm
15 mm × 15 mm
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the device.
LNA
LNA
LNA
LNA
IF ADC
IF ADC
IF ADC
IF ADC
PA
Phase
Shift
PA
Phase
Shift
PA
Phase
Shift
6
GPADC
x3
Synth
(20 GHz)
Digital
Front-end
(Decimation
filter chain)
Ramp
Generator
Cortex R4F
@ 200MHz
(User programmable)
Prog RAM
Data
RAM
Boot
ROM
QSPI
SPI
SPI / I2C
CAN-FD
ADC
Buffer
HW
Accel
DMA
Master sub-system
(Customer programmed)
Mailbox
C674x DSP
@600 MHz
L1P L1D
L2
(32kB) (32kB) (256kB)
Debug
UARTs
Test/
Debug
LVDS
HIL
Serial Flash interface
External MCU
interface
PMIC control
CAN-FD Communication
For debug
JTAG for debug/
development
High-speed ADC output
interface (for recording)
High-speed input for
hardware-in-loop verification
Osc.
Temp
RF/Analog sub-system
DMA
CRC
DSP sub-system
(Customer programmed)
Radar Data Memory
(L3)
Figure 1-1. Functional Block Diagram
2 Device Overview
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