(PDF) SN74HC86-Q1 Datasheet PDF | etcTI





SN74HC86-Q1 Datasheet PDF

Part Number SN74HC86-Q1
Description QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
Manufacture etcTI
Total Page 13 Pages
PDF Download Download SN74HC86-Q1 Datasheet PDF

Features: Datasheet pdf SN74HC86-Q1 QUADRUPLE 2-INPUT EXCLUSIVE- OR GATE D Qualified for Automotive App lications D Wide Operating Voltage Rang e of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumpti on, 20-µA Max ICC D ±4-mA Output Driv e at 5 V D Low Input Current of 1 µA M ax D True Logic SCLS587C − JUNE 2004 − REVISED APRIL 2008 D OR PW PACKAGE (TOP VIEW) 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y description/ordering inf ormation This device contains four ind ependent 2-input exclusive-OR gates. Th ey perform the Boolean function Y = A B or Y = AB + AB in positive logic. A common application is as a true/ compl ement element. If one of the inputs is low, the other input is reproduced in t rue form at the output. If one of the i nputs is high, the signal on the other input is reproduced inverted at the out put. ORDERING INFORMATION{ TA PACKAG E‡ ORDERABLE PART NUMBER TOP-SIDE M ARKING −40°C to 85°C SOIC − D TSSOP − PW Reel of 2500 Reel of 2000 SN.

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SN74HC86-Q1 datasheet
SN74HC86-Q1
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
D Qualified for Automotive Applications
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 20-µA Max ICC
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D True Logic
SCLS587C − JUNE 2004 − REVISED APRIL 2008
D OR PW PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
description/ordering information
This device contains four independent 2-input exclusive-OR gates. They perform the Boolean function
Y = A ę B or Y = AB + AB in positive logic.
A common application is as a true/ complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
ORDERING INFORMATION{
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 85°C
SOIC − D
TSSOP − PW
Reel of 2500
Reel of 2000
SN74HC86IDRQ1
SN74HC86IPWRQ1
HC86I
HC86I
SOIC − D
−40°C to 125°C
TSSOP − PW
Reel of 2500
Reel of 2000
SN74HC86QDRQ1
SN74HC86QPWRQ1
HC86Q
HC86Q
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at http://www.ti.com.
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each gate)
INPUTS
AB
OUTPUT
Y
LL
L
LH
H
HL
H
HH
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2008, Texas Instruments Incorporated
1

SN74HC86-Q1 datasheet
SN74HC86-Q1
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCLS587C − JUNE 2004 − REVISED APRIL 2008
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
Exclusive OR
=1
These are five equivalent exclusive-OR symbols valid for an ’HC86 gate in positive logic; negation may be
shown at any two ports.
Logic Identity Element
Even-Parity Element
Odd-Parity Element
= 2k 2k + 1
The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high) if
an odd number of inputs (i.e.,
only 1 of the 2) are active.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265




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