Modulators. UC1527B Datasheet

UC1527B Datasheet PDF


Part

UC1527B

Description

Regulating Pulse Width Modulators

Manufacture

Unitrode

Page 18 Pages
Datasheet
Download UC1527B Datasheet


UC1527B Datasheet
UC3527B
Not Recommended For New Designs
Regulating Pulse Width Modulators
application
INFO
available
UC1525B UC1527B
UC2525B UC2527B
UC3525B UC3527B
FEATURES
8 to 35V Operation
5.1V Buried Zener Reference
Trimmed to ±0.75%
100Hz to 500kHz Oscillator Range
Separate Oscillator Sync Terminal
Adjustable Deadtime Control
Internal Soft-Start
Pulse-by-Pulse Shutdown
Input Undervoltage Lockout with
Hysteresis
Latching PWM to Prevent Multiple
Pulses
Dual Source/Sink Output Drivers
Low Cross Conduction Output Stage
Tighter Reference Specifications
BLOCK DIAGRAM
DESCRIPTION
The UC1525B/1527B series of pulse width modulator integrated circuits
are designed to offer improved performance and lowered external parts
count when used in designing all types of switching power supplies. The
on-chip +5.1V buried zener reference is trimmed to ±0.75% and the input
common-mode range of the error amplifier includes the reference voltage,
eliminating external resistors. A sync input to the oscillator allows multiple
units to be slaved or a single unit to be synchronized to an external system
clock. A single resistor between the CT and the discharge terminals provide
a wide range of dead time adjustment. These devices also feature built-in
soft-start circuitry with only an external timing capacitor required. A shut-
down terminal controls both the soft-start circuitry and the output stages,
providing instantaneous turn off through the PWM latch with pulsed shut-
down, as well as soft-start recycle with longer shutdown commands. These
functions are also controlled by an undervoltage lockout which keeps the
outputs off and the soft-start capacitor discharged for sub-normal input volt-
ages. This lockout circuitry includes approximately 500mV of hysteresis for
jitter-free operation. Another feature of these PWM circuits is a latch follow-
ing the comparator. Once a PWM pulse has been terminated for any rea-
son, the outputs will remain off for the duration of the period. The latch is
reset with each clock pulse. The output stages are totem-pole designs ca-
pable of sourcing or sinking in excess of 200mA. The UC1525B output
stage features NOR logic, giving a LOW output for an OFF state. The
UC1527B utilizes OR logic which results in a HIGH output level when OFF.
SLUS376 JULY 1995
UDG-95055

UC1527B Datasheet
UC3527B
Not Recommended For New Designs
UC1525B UC1527B
UC2525B UC2527B
UC3525B UC3527B
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, (+VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Collector Supply Voltage (VC). . . . . . . . . . . . . . . . . . . . . . +40V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +5.5V
Analog Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VIN
Output Current, Source or Sink . . . . . . . . . . . . . . . . . . . 500mA
Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Oscillator Charging Current . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Power Dissipation at TA = +25°C. . . . . . . . . . . . . . . . . 1000mW
Power Dissipation at TC = +25°C . . . . . . . . . . . . . . . . 2000mW
Operating Junction Temperature . . . . . . . . . . –55°C to +150°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
All currents are positive into, negative out of the specified ter-
minal. Consult Packaging Section of Databook for thermal limi-
tations and considerations of packages.
RECOMMENDED OPERATING CONDITIONS
(Note 1)
Input Voltage (+VIN) . . . . . . . . . . . . . . . . . . . . . . . +8V to +35V
Collector Supply Voltage (VC) . . . . . . . . . . . . . . +4.5V to +35V
Sink/Source Load Current (steady state) . . . . . . . . 0 to 100mA
Sink/Source Load Current (peak) . . . . . . . . . . . . . . 0 to 400mA
Reference Load Current . . . . . . . . . . . . . . . . . . . . . . 0 to 20mA
Oscillator Frequency Range. . . . . . . . . . . . . . 100Hz to 400kHz
Oscillator Timing Resistor . . . . . . . . . . . . . . . . . . 2kto 150k
Oscillator Timing Capacitor . . . . . . . . . . . . . . 0.001µF to 0.1µF
Dead Time Resistor Range . . . . . . . . . . . . . . . . . . . 0to 500
Note 1: Range over which the device is functional and parame-
ter limits are guaranteed.
CONNECTION DIAGRAMS
DIL-16, SOIC-16 (Top View)
J or N, DW Packages
LCC-20, PLCC-20 (Top View)
L, Q Packages
ELECTRICAL CHARACTERISTICS:Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the
UC1525B and UC1527B; –40°C to +85°C for the UC2525B and UC2527B; 0°C to +70°C for the UC3525B and UC3527B; +VIN =
20V, TA = TJ.
UC1525B/UC2525B
UC1527B/UC2527B
UC3525B
UC3527B
PARAMETER
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX UNITS
Reference Section
Output Voltage
TJ = 25°C
5.062 5.10 5.138 5.036 5.10 5.164 V
Line Regulation
VIN = 8V to 35V
5 10
5 10 mV
Load Regulation
IL = 0mA to 20mA
7 15
7 15 mV
Temperature Stability (Note 2)
Over Operating Range
10 50
10 50 mV
Total Output Variation
Line, Load, and Temperature 5.036
5.164 5.024
5.176 V
Short Circuit Current
Output Noise Voltage (Note 2)
VREF = 0, TJ =25°C
10Hz f 10kHz, TJ = 25°C
80 100
40 200
80 100 mA
40 200 µVrms
Long Term Stability (Note 2)
TJ = 125°C, 1000 Hrs.
3 10
3 10 mV
2


Features Datasheet pdf UC3527B Not Recommended For New Designs Regulating Pulse Width Modulators app lication INFO available UC1525B UC1527 B UC2525B UC2527B UC3525B UC3527B FEAT URES • 8 to 35V Operation • 5.1V Bu ried Zener Reference Trimmed to ±0.75% • 100Hz to 500kHz Oscillator Range Separate Oscillator Sync Terminal Adjustable Deadtime Control • Inter nal Soft-Start • Pulse-by-Pulse Shutd own • Input Undervoltage Lockout with Hysteresis • Latching PWM to Prevent Multiple Pulses • Dual Source/Sink O utput Drivers • Low Cross Conduction Output Stage • Tighter Reference Spec ifications BLOCK DIAGRAM DESCRIPTION T he UC1525B/1527B series of pulse width modulator integrated circuits are desig ned to offer improved performance and l owered external parts count when used i n designing all types of switching powe r supplies. The on-chip +5.1V buried ze ner reference is trimmed to ±0.75% and the input common-mode range of the err or amplifier includes the reference voltage, eliminating external resistors. A sync input.
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