UCC27714 Driver Datasheet

UCC27714 Datasheet PDF, Equivalent


Part Number

UCC27714

Description

High-Speed 600-V High-Side Low-Side Gate Driver

Manufacture

etcTI

Total Page 30 Pages
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UCC27714
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UCC27714
SLUSBY6B – AUGUST 2015 – REVISED MARCH 2017
UCC27714 High-Speed, 600-V High-Side Low-Side Gate Driver
with 4-A Peak Output
1 Features
1 High-Side, Low-Side Configuration, with
Independent Inputs
• Fully Operational up to 600 V (HS Pin)
• Floating Channel Designed for Bootstrap
Operation
• Peak Output Current Capability of 4-A Sink 4-A
Source at VDD = 15 V
• Best-In-Class Propagation Delay (125-ns
Maximum)
• Best-In-Class Delay Matching (20-ns Maximum)
• TTL and CMOS Compatible Input Logic
• VDD Bias Supply Range of 10 V to 20 V
• Bias UVLO Protection for Both Channels
• Rail-to-Rail Drive
• Robust Operation Under Negative Voltage
Transients
• High dv/dt Immunity (HS Pin)
• Separated Grounds for Logic (VSS) and Driver
(COM) with Capability to Sustain Voltage
Difference
• Optional Enable Function (Pin 4)
• Outputs Held in LOW when Inputs Floating
• Inputs and Enable Pin Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage
• High and Low Voltage Pins Separated for
Maximum Creepage and Clearance
• Negative Voltage Handling Capability on Input and
Enable Pins
Simplified Schematic
Bias
RBIAS
RBOOT
DBOOT
Up to 600 V
Controller
PWM1
PWM2
VSS
EN
CVDD
UCC27714
7 VDD
HB 13
RHI
1 HI
RLI
2 LI
CLI CHI
3 VSS
HO 12
HS 11
LO 6
4 EN/NC COM 5
CBOOT
RHO
10 k:
RLO
Q1
Load
Q2
10 k:
2 Applications
• Half-Bridge and Full-Bridge Converters in Offline
AC and DC Power Supplies
• High-Density Switching Power Supplies for
Server, Telecom, IT and Industrial Infrastructure
• Solar Inverters, Motor Drive and UPS
3 Description
UCC27714 is a 600-V high-side, low-side gate driver
with 4-A source and 4-A sink current capability,
targeted to drive power MOSFETs or IGBTs. The
device comprises of one ground-referenced channel
(LO) and one floating channel (HO) which is designed
for operating with bootstrap supplies. The device
features excellent robustness and noise immunity
with capability to maintain operational logic at
negative voltages of up to –8 VDC on HS pin (at VDD
= 12 V).
The device accepts a wide range bias supply input
from 10 V to 20 V and offers UVLO protection for
both the VCC and HB bias supply pins. UCC27714 is
available in SOIC-14 package and rated to operate
from –40°C to 125°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UCC27714
SOIC (14)
3.91 mm × 8.65 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Propagation Delay Comparison
250
230 Competitor
210 TI
190
170
150
130
110
90
70
50
±40 ±20
0
20 40 60 80 100 120
Temperature (ƒC)
C037
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

UCC27714
UCC27714
SLUSBY6B – AUGUST 2015 – REVISED MARCH 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings ............................................................ 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements ................................................ 7
6.7 Typical Characteristics .............................................. 8
7 Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 21
8 Application and Implementation ........................ 27
8.1 Application Information............................................ 27
8.2 Typical Application ................................................. 27
9 Power Supply Recommendations...................... 35
10 Layout................................................................... 35
10.1 Layout Guidelines ................................................. 35
10.2 Layout Example .................................................... 35
11 Device and Documentation Support ................. 36
11.1 Device Support .................................................... 36
11.2 Trademarks ........................................................... 36
11.3 Electrostatic Discharge Caution ............................ 36
11.4 Glossary ................................................................ 36
11.5 Receiving Notification of Documentation Updates 36
11.6 Community Resources.......................................... 36
12 Mechanical, Packaging, and Orderable
Information ........................................................... 37
4 Revision History
Changes from Revision A (August 2015) to Revision B
Page
• Changed MAX Supply voltage from 18 V to 17 V. ................................................................................................................. 5
• Changed MAX Driver bootstrap voltage from 18 V to 17 V. .................................................................................................. 5
• Changed MAX Bootstrap pin voltage from 18 V to 17 V........................................................................................................ 5
• Changed MAX Input voltage with respect to VSS from 18 V to 17 V. .................................................................................. 5
• Added 40 ns NOM to tON Timing Requirements. .................................................................................................................... 7
• Added 40 ns NOM to tOFF Timing Requirements. .................................................................................................................. 7
• Deleted 18-V reference from all Typical Characteristics images............................................................................................ 8
• Changed Negative Voltage Chart Time vs Negative Voltage image. .................................................................................. 26
• Added Increase RHO and RLO, Reduce HS dV/dt image and description. ........................................................................... 31
• Added LO and HO Overshoot and Undershoot section. ...................................................................................................... 32
Changes from Original (August, 2015) to Revision A
Page
• Changed marketing status from Product preview to Final. ................................................................................................... 1
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Product Folder Links: UCC27714
Copyright © 2015–2017, Texas Instruments Incorporated


Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity UCC27714 SLUSBY6B – AUGUST 20 15 – REVISED MARCH 2017 UCC27714 High -Speed, 600-V High-Side Low-Side Gate D river with 4-A Peak Output 1 Features •1 High-Side, Low-Side Configuration , with Independent Inputs • Fully Ope rational up to 600 V (HS Pin) • Float ing Channel Designed for Bootstrap Oper ation • Peak Output Current Capabilit y of 4-A Sink 4-A Source at VDD = 15 V • Best-In-Class Propagation Delay (12 5-ns Maximum) • Best-In-Class Delay M atching (20-ns Maximum) • TTL and CMO S Compatible Input Logic • VDD Bias S upply Range of 10 V to 20 V • Bias UV LO Protection for Both Channels • Rai l-to-Rail Drive • Robust Operation Un der Negative Voltage Transients • Hig h dv/dt Immunity (HS Pin) • Separated Grounds for Logic (VSS) and Driver (CO M) with Capability to Sustain Voltage D ifference • Optional Enable Function (Pin 4) • Outputs Held in LOW when Inputs Floating • Inputs and Enable Pin Voltage Levels Not R.
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