Flash MCU. C8051F588 Datasheet

C8051F588 MCU. Datasheet pdf. Equivalent

C8051F588 Datasheet
Recommendation C8051F588 Datasheet
Part C8051F588
Description Mixed Signal ISP Flash MCU
Feature C8051F588; Analog Peripherals - 12-Bit ADC • Up to 200 ksps • Up to 32 external single-ended inputs • VREF from.
Manufacture Silicon Laboratories
Datasheet
Download C8051F588 Datasheet





Silicon Laboratories C8051F588
Analog Peripherals
- 12-Bit ADC
Up to 200 ksps
Up to 32 external single-ended inputs
VREF from on-chip VREF, external pin or VDD
Internal or external start of conversion source
Built-in temperature sensor
- Three Comparators
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage 1.8 to 5.25 V
- Typical operating current: 15 mA at 50 MHz;
Typical stop mode current: 230 µA
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 50 MIPS throughput with 50 MHz clock
- Expanded interrupt handler
Automotive Qualified
- Temperature Range: –40 to +125 °C
C8051F58x/F59x
Mixed Signal ISP Flash MCU Family
Memory
- 8448 bytes internal data RAM (256 + 8192 XRAM)
- 128 or 96 kB Banked Flash; In-system programma-
ble in 512-byte Sectors
- External 64 kB data memory interface programma-
ble for multiplexed or non-multiplexed mode
Digital Peripherals
- 40, 33, or 25 Port I/O; All 5 V push-pull with high
sink current
- CAN 2.0 Controller—no crystal required
- LIN 2.1 Controller (Master and Slave capable); no
crystal required
- Two Hardware enhanced UARTs, SMBus™, and
enhanced SPI™ serial ports
- Six general purpose 16-bit counter/timers
- Two 16-Bit programmable counter array (PCA)
peripherals with six capture/compare modules each
and enhanced PWM functionality
Clock Sources
- Internal 24 MHz with ±0.5% accuracy for CAN and
master LIN operation.
- External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
- Can switch between clock sources on-the-fly;
useful in power saving modes
Packages
- 48-Pin QFP/QFN (C8051F580/1/4/5)
- 40-Pin QFN (C8051F588/9-F590/1)
- 32-Pin QFP/QFN (C8051F582/3/6/7)
ANALOG
PERIPHERALS
A 12-bit
M
U
200 ksps
TEMP
SENSOR
X ADC
Voltage VREG
Comparators 0-2 VREF
DIGITAL I/O
UART 0-1
SMBus
SPI
PCA x 2
Timers 0-5
CAN
LIN
Ports 0-4
Crossbar
External
Memory
Interface
24 MHz PRECISION
INTERNAL OSCILLATOR
2x Clock Multiplier
HIGH-SPEED CONTROLLER CORE
128 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(50 MIPS)
DEBUG
CIRCUITRY
8 kB XRAM
POR WDT
Rev 1.5 5/18
Copyright © 2018 by Silicon Laboratories C8051F580/1/2/3/4/5/6/7/8/9-F590/1



Silicon Laboratories C8051F588
C8051F58x/F59x
Table of Contents
1. System Overview ..................................................................................................... 18
2. Ordering Information ............................................................................................... 22
3. Pin Definitions.......................................................................................................... 24
4. Package Specifications ........................................................................................... 32
4.1. QFP-48 Package Specifications........................................................................ 32
4.2. QFN-48 Package Specifications........................................................................ 34
4.3. QFN-40 Package Specifications........................................................................ 36
4.4. QFP-32 Package Specifications........................................................................ 38
4.5. QFN-32 Package Specifications........................................................................ 40
5. Electrical Characteristics ........................................................................................ 42
5.1. Absolute Maximum Specifications..................................................................... 42
5.2. Electrical Characteristics ................................................................................... 43
6. 12-Bit ADC (ADC0) ................................................................................................... 54
6.1. Modes of Operation ........................................................................................... 55
6.1.1. Starting a Conversion................................................................................ 55
6.1.2. Tracking Modes......................................................................................... 55
6.1.3. Timing ....................................................................................................... 56
6.1.4. Burst Mode................................................................................................ 57
6.2. Output Code Formatting .................................................................................... 59
6.2.1. Settling Time Requirements...................................................................... 59
6.3. Selectable Gain ................................................................................................. 60
6.3.1. Calculating the Gain Value........................................................................ 60
6.3.2. Setting the Gain Value .............................................................................. 62
6.4. Programmable Window Detector....................................................................... 68
6.4.1. Window Detector In Single-Ended Mode .................................................. 70
6.5. ADC0 Analog Multiplexer .................................................................................. 72
7. Temperature Sensor ................................................................................................ 74
8. Voltage Reference.................................................................................................... 75
9. Comparators............................................................................................................. 77
9.1. Comparator Multiplexer ..................................................................................... 85
10. Voltage Regulator (REG0) ..................................................................................... 89
11. CIP-51 Microcontroller........................................................................................... 91
11.1. Performance .................................................................................................... 91
11.2. Instruction Set.................................................................................................. 93
11.2.1. Instruction and CPU Timing .................................................................... 93
11.3. CIP-51 Register Descriptions .......................................................................... 97
11.4. Serial Number Special Function Registers (SFRs) ....................................... 101
12. Memory Organization .......................................................................................... 102
12.1. Program Memory........................................................................................... 102
12.1.1. MOVX Instruction and Program Memory .............................................. 104
12.2. Data Memory ................................................................................................. 104
12.2.1. Internal RAM ......................................................................................... 105
12.2.1.1. General Purpose Registers .......................................................... 105
Rev 1.5
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Silicon Laboratories C8051F588
C8051F58x/F59x
12.2.1.2. Bit Addressable Locations ............................................................ 105
12.2.1.3. Stack .......................................................................................... 105
13. Special Function Registers................................................................................. 106
13.1. SFR Paging ................................................................................................... 106
13.2. Interrupts and SFR Paging ............................................................................ 106
13.3. SFR Page Stack Example ............................................................................. 107
14. Interrupts .............................................................................................................. 126
14.1. MCU Interrupt Sources and Vectors.............................................................. 126
14.1.1. Interrupt Priorities.................................................................................. 127
14.1.2. Interrupt Latency ................................................................................... 127
14.2. Interrupt Register Descriptions ...................................................................... 129
14.3. External Interrupts INT0 and INT1................................................................. 136
15. Flash Memory....................................................................................................... 138
15.1. Programming The Flash Memory .................................................................. 138
15.1.1. Flash Lock and Key Functions .............................................................. 138
15.1.2. Flash Erase Procedure ......................................................................... 138
15.1.3. Flash Write Procedure .......................................................................... 139
15.1.4. Flash Write Optimization ....................................................................... 139
15.2. Non-volatile Data Storage ............................................................................. 140
15.3. Security Options ............................................................................................ 140
15.4. Flash Write and Erase Guidelines ................................................................. 142
15.4.1. VDD Maintenance and the VDD monitor ................................................ 142
15.4.2. PSWE Maintenance .............................................................................. 142
15.4.3. System Clock ........................................................................................ 143
16. Power Management Modes................................................................................. 147
16.1. Idle Mode....................................................................................................... 147
16.2. Stop Mode ..................................................................................................... 148
16.3. Suspend Mode .............................................................................................. 148
17. Reset Sources ...................................................................................................... 150
17.1. Power-On Reset ............................................................................................ 151
17.2. Power-Fail Reset/VDD Monitor ..................................................................... 152
17.3. External Reset ............................................................................................... 153
17.4. Missing Clock Detector Reset ....................................................................... 153
17.5. Comparator0 Reset ....................................................................................... 154
17.6. PCA Watchdog Timer Reset ......................................................................... 154
17.7. Flash Error Reset .......................................................................................... 154
17.8. Software Reset .............................................................................................. 154
18. External Data Memory Interface and On-Chip XRAM ....................................... 156
18.1. Accessing XRAM........................................................................................... 156
18.1.1. 16-Bit MOVX Example .......................................................................... 156
18.1.2. 8-Bit MOVX Example ............................................................................ 156
18.2. Configuring the External Memory Interface ................................................... 157
18.3. Port Configuration.......................................................................................... 157
18.4. Multiplexed and Non-multiplexed Selection................................................... 162
18.4.1. Multiplexed Configuration...................................................................... 162
4 Rev 1.5





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