ARG81800 Regulators Datasheet

ARG81800 Datasheet PDF, Equivalent


Part Number

ARG81800

Description

40V 500mA / 1.0A Synchronous Buck Regulators

Manufacture

Allegro

Total Page 30 Pages
Datasheet
Download ARG81800 Datasheet


ARG81800
ARG81800
40 V, 500 mA / 1.0 A Synchronous Buck Regulators
with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD
FEATURES AND BENEFITS
• Automotive AEC-Q100 qualified
• Input operating voltage range: 3.5 to 36 V
□Withstands surge voltages to 40 V for load dump
• Low-Power (LP) mode—draws just 8 µA from VIN while
maintaining 3.3 or 5.0 VOUT
• AUTO mode allows automatic transition between PWM
and LP mode based on load current
• Programmable PWM frequency (fSW): 250 kHz to 2.4 MHz
• PWM frequency dithering and controlled switch node
slew rate reduce EMI/EMC signature
• CLKOUT allows interleaving and dithering of “downstream”
regulators using their synchronization inputs
• Interleaving minimizes input filter capacitor requirement
and improves EMI/EMC performance
• Synchronization of PWM frequency to external clock on
SYNCIN pin
• Adjustable output voltage: ±1.5% accuracy over
operating temperature range (‒40°C to 150°C)
• Maximized duty cycle at low VIN improves dropout
• Soft recovery from dropout condition
• Adjustable soft-start time controls inrush current to
accommodate a wide range of output capacitances
• External compensation provides flexibility to tune the
system for maximum stability or fast transient response
Continued on next page...
APPLICATIONS
• Infotainment
• Navigation Systems
• Instrument Clusters
• Audio Systems
• ADAS Applications
• Battery Powered Systems
• Industrial Systems
• Network and Telecom
• Home Audio
• HVAC Systems
DESCRIPTION
TheARG81800 includes all the control and protection circuitry
to produce a PWM regulator with ±1.5% output voltage
accuracy, with ultralow quiescent current to enable “keepalive”
supply operation with minimal current draw from the supply
during very light load regulation. There are two versions of
the ARG81800 available, 500 mA and 1 A, so the physical size
of the power components can be optimized for lower current
systems, thus reducing PCB area and saving cost. PWM
switching frequency can be programmed over a wide range to
balance efficiency, component sizing, and EMC performance.
If VIN decays and the duty cycle reaches its maximum, the
ARG81800 will automatically fold back its PWM frequency
to extend the duty cycle and maintain VOUT.
The ARG81800 employs Low-Power (LP) mode to maintain
the output voltage at no load or very light load conditions while
drawing only micro-amps from VIN. The ARG81800 includes a
PWM/AUTO control pin so the system can dynamically force
either PWM or AUTO mode by setting this pin high or low,
respectively.
If the SYNCIN pin is driven by an external clock, theARG81800
will be forced into PWM mode and synchronize to the incoming
clock. TheARG81800 adds frequency dithering to the SYNCIN
clock to reduce EMI/EMC.TheARG81800 provides a CLKOUT
pin so “downstream” regulators can be easily interleaved and
dithered via their synchronization inputs.
Continued on next page...
PACKAGE:
20-pin, 4 mm × 4 mm,
QFN (ES) with wettable flank
Not to scale
ARG81800-DS
MCO-0000676
3.5 to 36 V
1 µF
14.3 kΩ
fSW = 2.15 MHz
22 nF
VIN
GND
PGND
PWM/AUTO
EN
BIAS
BOOT
SW
FB
SYNCIN
FSET
SS
PGOOD
CLKOUT
COMP
VREG
0.1 µF
95.3 kΩ
4.7 µF
3.3 µH
301 kΩ
4.7 pF
2.2 nF
40.2 kΩ
3.3 V, 1 A
20 µF
10 kΩ
68 pF
Typical Application Diagram
June 11, 2019

ARG81800
ARG81800
40 V, 500 mA / 1.0 A Synchronous Buck Regulators
with Ultralow Quiescent Current, SYNCIN, CLKOUT, and PGOOD
FEATURES AND BENEFITS
• Enable input can command ultralow 1 µA shutdown current
• Open-drain PGOOD output with rising delay
• Pre-bias startup allows quick restart and avoids reset
• Overvoltage, pulse-by-pulse current limit, hiccup mode short
circuit, and thermal protections
• Robust FMEA: pin open/short and component faults
DESCRIPTION
The ARG81800 has external compensation, so it can be tuned to
satisfy a wide range of system goals with many different external
components over a wide range of PWM frequencies. TheARG81800
includes adjustable soft start to minimize inrush current. The
ARG81800 monitors the feedback voltage to provide an open-drain
power good signal. The Enable input can command an ultra-low
current shutdown mode with VOUT = 0 V.
Extensive protection features of the ARG81800 include pulse-by-
pulse current limit, hiccup mode short circuit protection, BOOT
open/short voltage protection, VIN undervoltage lockout, VOUT
overvoltage protection, and thermal shutdown. The ARG81800 is
supplied in a low profile 20-pin wettable flank QFN package (suffix
“ES”) with exposed power pad.
SELECTION GUIDE
Part Number
DC Current
Package
Packing
Lead Frame
ARG81800KESJSR
ARG81800KESJSR-1
1 A
0.5 A
20-pin wettable flank QFN
package with thermal pad
6000 pieces per 13-inch reel
100% matte tin
*Contact Allegro for additional packing options
Table of Contents
Features and Benefits............................................................ 1
Description........................................................................... 1
Package.............................................................................. 1
Typical Application Diagram.................................................... 1
Selection Guide.................................................................... 2
Absolute Maximum Ratings.................................................... 3
Thermal Characteristics......................................................... 3
Functional Block Diagram...................................................... 4
Pinout Diagram and Terminal List............................................ 5
Electrical Characteristics........................................................ 6
Typical Performance Characteristics.......................................11
Functional Description......................................................... 16
Overview........................................................................ 16
Reference Voltage........................................................... 16
Internal VREG Regulator.................................................. 16
Oscillator/Switching Frequency.......................................... 16
Synchronization (SYNCIN) and Clock Output (CLKOUT)......... 16
Frequency Dither............................................................. 16
Transconductance Error Amplifier...................................... 17
Compensation Components.............................................. 18
Power MOSFETs............................................................. 18
BOOT Regulator.............................................................. 18
Soft Start (Startup) and Inrush Current Control.................... 18
Slope Compensation........................................................ 18
Pre-Biased Startup........................................................... 19
Dropout.......................................................................... 19
PGOOD Output............................................................... 19
Current Sense Amplifier.................................................... 19
Pulse-Width Modulation (PWM)......................................... 19
Low-Power (LP) Mode...................................................... 20
Protection Features.......................................................... 21
Undervoltage Lockout (UVLO)....................................... 21
Pulse-by-Pulse Peak Current Protection (PCP)................ 21
Overcurrent Protection (OCP) and Hiccup Mode.............. 21
BOOT Capacitor Protection........................................... 22
Asynchronous Diode Protection..................................... 22
Overvoltage Protection (OVP)........................................ 22
SW Pin Protection........................................................ 22
Pin-to-Ground and Pin-to-Short Protections..................... 22
Thermal Shutdown (TSD).............................................. 23
Application Information........................................................ 25
Design and Component Selection...................................... 25
PWM Switching Frequency (RFSET)................................ 25
Output Voltage Setting.................................................. 25
Output Inductor (LO)..................................................... 26
Output Capacitors (CO)................................................. 27
Output Voltage Ripple – Ultralow-IQ LP Mode.................. 28
Input Capacitors........................................................... 29
Bootstrap Capacitor...................................................... 29
Soft Start and Hiccup Mode Timing (CSS)........................ 29
Compensation Components (RZ, CZ, and CP).................. 30
Power Stage................................................................ 30
Error Amplifier.............................................................. 31
A Generalized Tuning Procedure.................................... 32
Power Dissipation and Thermal Calculations.......................... 34
EMI/EMC Aware PCB Design............................................... 36
Typical Reference Designs................................................... 39
Package Outline Drawing..................................................... 41
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
2


Features ARG81800 40 V, 500 mA / 1.0 A Synchro nous Buck Regulators with Ultralow Quie scent Current, SYNCIN, CLKOUT, and PGOO D FEATURES AND BENEFITS • Automotiv e AEC-Q100 qualified • Input operati ng voltage range: 3.5 to 36 V □□Wi thstands surge voltages to 40 V for lo ad dump • Low-Power (LP) mode—draw s just 8 µA from VIN while maintaining 3.3 or 5.0 VOUT • AUTO mode allow s automatic transition between PWM and LP mode based on load current • Prog rammable PWM frequency (fSW): 250 kHz to 2.4 MHz • PWM frequency ditherin g and controlled switch node slew rate reduce EMI/EMC signature • CLKOUT al lows interleaving and dithering of “d ownstream” regulators using their syn chronization inputs • Interleaving m inimizes input filter capacitor require ment and improves EMI/EMC performance Synchronization of PWM frequency to external clock on SYNCIN pin • Adju stable output voltage: ±1.5% accuracy over operating temperature range (‒40°C to 150°C) • Maximized duty cycle at low VIN improves dropout •.
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