N-channel MOSFET. TPWR8004PL Datasheet

TPWR8004PL MOSFET. Datasheet pdf. Equivalent

TPWR8004PL Datasheet
Recommendation TPWR8004PL Datasheet
Part TPWR8004PL
Description Silicon N-channel MOSFET
Feature TPWR8004PL; MOSFETs Silicon N-channel MOS (U-MOS-H) TPWR8004PL 1. Applications • High-Efficiency DC-DC Converte.
Manufacture Toshiba
Datasheet
Download TPWR8004PL Datasheet




Toshiba TPWR8004PL
MOSFETs Silicon N-channel MOS (U-MOS-H)
TPWR8004PL
1. Applications
• High-Efficiency DC-DC Converters
• Switching Voltage Regulators
• Motor Drivers
2. Features
(1) High-speed switching
(2) Small gate charge: QSW = 23 nC (typ.)
(3) Small output charge: Qoss = 85.4 nC (typ.)
(4) Low drain-source on-resistance: RDS(ON) = 0.65 m(typ.) (VGS = 10 V)
(5) Low leakage current: IDSS = 10 µA (max) (VDS = 40 V)
(6) Enhancement mode: Vth = 1.4 to 2.4 V (VDS = 10 V, ID = 1.0 mA)
3. Packaging and Internal Circuit
TPWR8004PL
DSOP Advance
1, 2, 3: Source
4: Gate
5, 6, 7, 8: Drain
©2015-2019
Toshiba Electronic Devices & Storage Corporation
1
Start of commercial production
2014-09
2019-10-21
Rev.5.0



Toshiba TPWR8004PL
TPWR8004PL
4. Absolute Maximum Ratings (Note) (Ta = 25 unless otherwise specified)
Characteristics
Symbol
Rating
Unit
Drain-source voltage
VDSS 40 V
Gate-source voltage
VGSS
±20
Drain current (DC)
(Tc = 25 ) (Note 1), (Note 2)
(Bottom drain)
ID
150 A
Drain current (DC)
Drain current (pulsed)
(Silicon limit)
(t = 100 µs)
(Note 1), (Note 2)
(Note 1)
ID
IDP
340 A
500 A
Power dissipation
(Tc = 25 )
(Bottom drain)
PD 170 W
Power dissipation
Power dissipation
Single-pulse avalanche energy
(Note 3)
(Note 4)
(Note 5)
PD
PD
EAS
3.0 W
1.0 W
336 mJ
Single-pulse avalanche current
Channel temperature
Storage temperature
(Note 5)
IAS
Tch
Tstg
120
175
-55 to 175
A
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
5. Thermal Characteristics
Characteristics
Symbol
Channel-to-case thermal resistance
Bottom drain
(Tc = 25 )
Rth(ch-c)
Channel-to-case thermal resistance
Top source
(Tc = 25 )
Rth(ch-c)
Channel-to-ambient thermal resistance
(Ta = 25 )
(Note 3)
Rth(ch-a)
Channel-to-ambient thermal resistance
(Ta = 25 )
(Note 4)
Rth(ch-a)
Note 1: Ensure that the channel temperature does not exceed 175 .
Note 2: Limited by package limit. Silicon chip capability is 340 A. (Tc = 25 )(Bottom drain)
Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1
Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2
Note 5: VDD = 32 V, Tch = 25 (initial), L = 18 µH, IAS = 120 A
Max Unit
0.88 /W
0.93 /W
50 /W
142 /W
Fig. 5.1 Device Mounted on a Glass-Epoxy
Board (a)
Fig. 5.2 Device Mounted on a Glass-Epoxy
Board (b)
Note: This transistor is sensitive to electrostatic discharge and should be handled with care.
©2015-2019
Toshiba Electronic Devices & Storage Corporation
2
2019-10-21
Rev.5.0



Toshiba TPWR8004PL
TPWR8004PL
6. Electrical Characteristics
6.1. Static Characteristics (Ta = 25 unless otherwise specified)
Characteristics
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
Symbol
Test Condition
IGSS
IDSS
V(BR)DSS
V(BR)DSX
Vth
RDS(ON)
VGS = ±20 V, VDS = 0 V
VDS = 40 V, VGS = 0 V
ID = 10 mA, VGS = 0 V
ID = 10 mA, VGS = -20 V
VDS = 10 V, ID = 1.0 mA
VGS = 4.5 V, ID = 50 A
VGS = 10 V, ID = 50 A
Min Typ. Max Unit
  ±0.1 µA
  10
40   V
25  
1.4 2.4
0.95 1.35 m
0.65 0.80
6.2. Dynamic Characteristics (Ta = 25 unless otherwise specified)
Characteristics
Input capacitance
Reverse transfer capacitance
Output capacitance
Gate resistance
Switching time (rise time)
Switching time (turn-on time)
Switching time (fall time)
Switching time (turn-off time)
Symbol
Ciss
Crss
Coss
rg
tr
ton
tf
toff
Test Condition
VDS = 20 V, VGS = 0 V, f = 1 MHz
See Fig. 6.2.1
Min Typ. Max Unit
7370 9600 pF
58
1930
0.6 1.1
13 ns
26
14
63
VDD 20 V
VGS = 0 V/10 V
ID = 50 A
RL = 0.4
RGG = 4.7
RGS = 4.7
Duty 1 %, tw = 10 µs
Fig. 6.2.1 Switching Time Test Circuit
6.3. Gate Charge Characteristics (Ta = 25 unless otherwise specified)
Characteristics
Total gate charge (gate-source plus
gate-drain)
Gate-source charge 1
Gate-drain charge
Gate switch charge
Output charge
Symbol
Qg
Qgs1
Qgd
QSW
Qoss
Test Condition
VDD 20 V, VGS = 10 V, ID = 50 A
VDD 20 V, VGS = 4.5 V, ID = 50 A
VDD 20 V, VGS = 10 V, ID = 50 A
VDS = 20 V, VGS = 0 V
Min Typ. Max Unit
103
49
25
12.4
23
85.4
nC
6.4. Source-Drain Characteristics (Ta = 25 unless otherwise specified)
Characteristics
Symbol
Test Condition
Min Typ. Max Unit
Reverse drain current (pulsed)
(Note 6)
IDRP
(t = 100 µs)
Diode forward voltage
VDSF
IDR = 150 A, VGS = 0 V
Reverse recovery time
Reverse recovery charge
trr VR = 20 V, IDR = 37.5 A, VGS =
Qrr 0 V, -dIDR/dt = 100 A/µs
Note 6: Ensure that the channel temperature does not exceed 175 .
500 A
-1.2 V
58 ns
70 nC
©2015-2019
Toshiba Electronic Devices & Storage Corporation
3
2019-10-21
Rev.5.0





@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)