Gate Drivers. FAN3213 Datasheet

FAN3213 Drivers. Datasheet pdf. Equivalent

FAN3213 Datasheet
Recommendation FAN3213 Datasheet
Part FAN3213
Description Low-Side Gate Drivers
Feature FAN3213; FAN3213 / FAN3214 — Dual-4A, High-Speed, Low-Side Gate Drivers FAN3213 / FAN3214 Dual-4 A, High-Spe.
Manufacture ON Semiconductor
Datasheet
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ON Semiconductor FAN3213
FAN3213 / FAN3214
Dual-4 A, High-Speed, Low-Side Gate Drivers
Features
Industry-Standard Pin Out
4.5 to 18 V Operating Range
5 A Peak Sink/Source at VDD = 12 V
4.3 A Sink / 2.8 A Source at VOUT = 6 V
TTL Input Thresholds
Tw o Versions of Dual Independent Drivers:
- Dual Inverting (FAN3213)
- Dual Non-Inverting (FAN3214)
Internal Resistors Turn Driver Off If No Inputs
MillerDrive™ Technology
12 ns / 9 ns Typical Rise/Fall Times w ith 2.2 nF
Load
Typical Propagation Delay Under 20 ns Matched
w ithin 1 ns to the Other Channel
Double Current Capability by Paralleling Channels
Standard SOIC-8 Package
Rated from 40°C to +125°C Ambient
Automotive Qualified to AEC-Q100 (F085 Version)
Applications
Sw itch-Mode Pow er Supplies
High-Efficiency MOSFET Sw itching
Synchronous Rectifier Circuits
DC-to-DC Converters
Motor Control
Automotive-Qualified Systems (F085 version)
Description
The FA N3213 and FAN3214 dual 4 A gate drivers are
designed to drive N-channel enhancement- mode
MOSFETs in low -side sw itching applications by
providing high peak current pulses dur ing the short
sw itching intervals. They are both available w ith TTL
input thresholds. Internal circuitry provides an under-
voltage lockout function by holding the output LOW until
the supply voltage is w ithin the operating range. In
addition, the drivers feature matched internal
propagation delays betw een A and B channels for
applications requir ing dual gate drives w ith critical
timing, such as synchronous rectifiers. This also
enables connecting tw o drivers in parallel to effectively
double the current capability driving a single MOSFET.
The FA N3213/14 drivers incorporate Miller Drive™
architecture for the final output stage. This bipolar-
MOSFET combination provides high current during the
Miller plateau stage of the MOSFET turn-on / turn-off
process to minimize sw itching loss, w hile providing rail-
to-rail voltage sw ing and reverse current capability.
The FAN3213 offers two inverting drivers and the
FA N3214 offers tw o non-inverting drivers. Both are
offered in a standard 8-pin SOIC package.
NC 1
INA 2
GND 3
INB 4
A
B
8 NC
7 OUTA
6 VDD
5 OUTB
NC 1
INA 2
GND 3
INB 4
A
B
8 NC
7 OUTA
6 VDD
5 OUTB
FAN3213
Figure 1. Pin Configurations
FAN3214
© 2008 Semiconductor Components Industries, LLC.
October-2017, Rev.2
Publication Order Number:
FAN3214 /D



ON Semiconductor FAN3213
Ordering Information
Part Number
Logic
FAN3213TMX
Dual Inverting Channels
FAN3214TMX
Dual Non-Inverting Channels
FA N3213TMX _F085(1)
Dual Inverting Channels
FA N3214TMX _F085(1)
Dual Non-Inverting Channels
Note :
1. Qualified to AEC-Q100
Input
Threshold
Package
Packing Quantity
Method per Reel
TTL
SOIC-8
Tape & Reel 2,500
Package Outlines
18
27
36
45
Figure 2. SOIC-8 (Top View )
Thermal Characteristics(2)
Package
8-Pin Small Outline Integrated Circuit (SOIC)
JL(3)
38
JT(4)
29
JA(5)
87
(6)
JB
41
(7)
JT
2.3
Unit
°C/W
Note s :
2. Estimates derived from thermal simulation; actual values depend on the application.
3. Theta_JL (JL): Thermal resistance betw een the semiconductor junction and the bottom surface of all the leads
(including any thermal pad) that are typically soldered to a PCB.
4. Theta_JT (JT): Thermal resistance betw een the semiconductor junction and the top surface of the package,
assuming it is held at a uniform temperature by a top-side heatsink.
5. Theta_JA (ΘJA): Thermal resistance betw een junction and ambient, dependent on the PCB design, heat sinking,
and airflow . The value given is for natural convection w ith no heatsink, using a 2S2P board, as specified in
JEDEC standards JESD51-2, JESD51-5, and JESD51-7, as appropriate.
6. Psi_JB (JB): Thermal characterization parameter providing correlation betw een semiconductor junction
temperature and an application circuit board reference point for the thermal environment defined in Note 5. For
the SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6.
7. Psi_JT (JT): Thermal characterization parameter providing correlation betw een the semiconductor junction
temperature and the center of the top of the package for the thermal environment defined in Note 5.
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ON Semiconductor FAN3213
Pin Configurations
NC 1
INA 2
GND 3
INB 4
A
B
8 NC
7 OUTA
6 VDD
5 OUTB
NC 1
INA 2
GND 3
INB 4
A
B
8 NC
7 OUTA
6 VDD
5 OUTB
FAN3213
FAN3214
Figure 3. Pin Configurations (Repeated)
Pin Definitions
Pin Name
1 NC
2 INA
3 GND
4 INB
5
(FAN3213)
OUTB
5
(FAN3214)
OUTB
6 VDD
7
(FAN3213)
OUTA
7
(FAN3214)
OUTA
8 NC
Pin Description
No Connect. This pin can be grounded or left floating.
Input to Channel A.
Ground. Common ground reference for input and output circuits.
Input to Channel B.
Gate Drive Output B (inverted from the input): Held LOW unless required input is
present and VDD is above UVLO threshold.
Gate Drive Output B: Held LOW unless required input(s) are present and V DD is above
UVLO threshold.
Supply Voltage. Provides pow er to the IC.
Gate Drive Output A (inverted from the input): Held LOW unless required input is
present and VDD is above UVLO threshold.
Gate Drive Output A: Held LOW unless required input(s) are present and VDD is above
UVLO threshold.
No Connect. This pin can be grounded or left floating.
Output Logic
FAN3213 (x=A or B)
INx OUTx
01
1(9) 0
Note :
9. Default input signal if no external connection is made.
FAN3214 (x=A or B)
INx OUTx
0(9) 0
11
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