Differential Amplifier. THS4541-Q1 Datasheet

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THS4541-Q1 Datasheet
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Part THS4541-Q1
Description Fully Differential Amplifier
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THS4541-Q1
SLOS930B – NOVEMBER 2015 – REVISED NOVEMBER 2019
THS4541-Q1 Negative Rail Input, Rail-to-Rail Output, Precision, 850-MHz
Fully Differential Amplifier
1 Features
1 AEC-Q100 qualified for automotive applications:
– Temperature grade 1: –40°C to +125°C, TA
• Bandwidth: 500 MHz (G = 2 V/V)
• Gain bandwidth product: 850 MHz
• Slew rate: 1500 V/µs
• HD2: –95 dBc at 10 MHz (2 VPP, RL = 500 )
• HD3: –90 dBc at 10 MHz (2 VPP, RL = 500 )
• Input voltage noise: 2.2 nV/Hz (f > 100 kHz)
• Low offset drift: ±0.5 µV/°C (typ)
• Negative rail input (NRI)
• Rail-to-rail output (RRO)
• Power supply:
– Single-supply voltage range: 2.7 V to 5.4 V
– Split-supply voltage range: ±1.35 V to ±2.7 V
– Quiescent current: 10.1 mA (5-V supply)
• Power-down capability: 2 µA (typ)
2 Applications
Mechanically scanning LIDAR
• Solid state LIDAR
Thermal imaging cameras
• Microbolometer cameras
• Time-of-flight (ToF) cameras
Simplified Schematic
50- Input Match,
Gain of 2 V/V from Rt,
Single-Ended Source to
Differential Output
THS4541 Wideband,
Fully-Differential Amplifier
Rf1
402
50-
Source
C1 Rg1
100 nF 191
Rt
60.2
Vocm
Rg2
221
Vcc
±
+
FDA
±
+ PD
Vcc
Rload
500
Output
Measurement
Point
C2
100 nF
Rf2
402
3 Description
The THS4541-Q1 is a low-power, voltage-feedback,
fully differential amplifier (FDA) with an input
common-mode range below the negative rail, and
rail-to-rail output. Designed for low-power data
acquisition systems where high density is critical in a
high-performance analog-to-digital converter (ADC) or
digital-to-analog converter (DAC) interface design.
The THS4541-Q1 features the negative-rail input
required when interfacing a DC-coupled, ground-
centered, source signal. This negative-rail input, with
rail-to-rail output, allows for easy interface between
single-ended, ground-referenced, bipolar signal
sources and a wide variety of successive
approximation register (SAR), delta-sigma (ΔΣ), or
pipeline ADCs using only a single 2.7-V to 5.4-V
power supply.
The THS4541-Q1 is characterized for operation over
the wide temperature range of –40°C to +125°C and
is available in a 16-pin VQFN package both with and
without wettable flanks. The package with wettable
flanks eases post-assembly visual inspection and is
available as the THS4541W-Q1.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
THS4541-Q1
THS4541W-Q1(2)
VQFN (16)
VQFN (16)
3.00 mm × 3.00 mm
3.00 mm × 3.00 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
(2) Wettable flanks package option.
Single to Differential Gain of 2, 2-VPP Output
-50
HD2
-60 HD3
-70
-80
-90
-100
-110
-120
-130
-140
0.1
1
Frequency (MHz)
10
50
D013
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments THS4541-Q1
THS4541-Q1
SLOS930B – NOVEMBER 2015 – REVISED NOVEMBER 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 4
7.5 Electrical Characteristics: (Vs+) – Vs– = 5 V........... 5
7.6 Electrical Characteristics: (Vs+) – Vs– = 3 V........... 8
7.7 Typical Characteristics ............................................ 11
8 Parameter Measurement Information ................ 21
8.1 Example Characterization Circuits .......................... 21
8.2 Frequency-Response Shape Factors ..................... 23
8.3 I/O Headroom Considerations ................................ 26
8.4 Output DC Error and Drift Calculations and the Effect
of Resistor Imbalances ............................................ 28
8.5 Noise Analysis......................................................... 30
8.6 Factors Influencing Harmonic Distortion ................. 31
8.7 Driving Capacitive Loads ........................................ 32
8.8 Thermal Analysis..................................................... 32
9 Detailed Description ............................................ 33
9.1 Overview ................................................................. 33
9.2 Functional Block Diagram ....................................... 34
9.3 Feature Description................................................. 35
9.4 Device Functional Modes........................................ 36
10 Application and Implementation........................ 44
10.1 Application Information.......................................... 44
10.2 Typical Applications .............................................. 44
11 Power Supply Recommendations ..................... 49
12 Layout................................................................... 49
12.1 Layout Guidelines ................................................. 49
12.2 Layout Example .................................................... 50
13 Device and Documentation Support ................. 51
13.1 Device Support...................................................... 51
13.2 Documentation Support ........................................ 51
13.3 Receiving Notification of Documentation Updates 51
13.4 Support Resources ............................................... 52
13.5 Trademarks ........................................................... 52
13.6 Electrostatic Discharge Caution ............................ 52
13.7 Glossary ................................................................ 52
14 Mechanical, Packaging, and Orderable
Information ........................................................... 52
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (November 2015) to Revision B
Page
• Changed AEC-Q100 specific Features bullet......................................................................................................................... 1
• Changed Applications section ............................................................................................................................................... 1
• Added wettable flanks package (THS4541W-Q1) information to document ......................................................................... 1
Changes from Original (November 2015) to Revision A
Page
• Changed device status from Product Preview to Production Data ....................................................................................... 1
2 Submit Documentation Feedback
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: THS4541-Q1



Texas Instruments THS4541-Q1
www.ti.com
5 Device Comparison Table
DEVICE
THS4531A
THS4521
THS4520
BW (MHz)
36
145
620
IQ (mA)
0.25
0.95
14.2
THS4541-Q1
SLOS930B – NOVEMBER 2015 – REVISED NOVEMBER 2019
THD (dBc) 2 VPP AT 100 kHz
–104
–102
–107
INPUT NOISE
(nV/Hz)
10
4.6
2
RAIL-TO-RAIL
Out
Out
Out
6 Pin Configuration and Functions
RGT Package
16-Pin VQFN With Exposed Thermal Pad
Top View
16 15 14 13
FB– 1
IN+ 2
IN– 3
FB+ 4
12 PD
11 OUT–
10 OUT+
9 Vocm
5 6 78
NAME
FB+
FB–
IN+
IN–
NC
OUT+
OUT–
PD
Vocm
Vs+
Vs–
PIN
NO. (1)
4
1
2
3
10
11
12
9
5
6
7
8
13
14
15
16
Pin Functions
I/O DESCRIPTION
O Noninverted (positive) output feedback
O Inverted (negative) output feedback
I Noninverting (positive) amplifier input
I Inverting (negative) amplifier input
— No internal connection
O Noninverted (positive) amplifier output
O Inverted (negative) amplifier output
I Power down. PD = logic low = power off mode; PD = logic high = normal operation.
I Common-mode voltage input
I Positive power-supply input
I Negative power-supply input
(1) Solder the exposed thermal pad to a heat-spreading power or ground plane. This pad is electrically isolated from the die, but must be
connected to a power or ground plane and not floated.
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: THS4541-Q1
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