DS125BR111 Repeater Datasheet

DS125BR111 Datasheet, PDF, Equivalent


Part Number

DS125BR111

Description

Low Power 12.5 Gbps 1-Lane Linear Repeater

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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DS125BR111
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DS125BR111
SNLS430C – OCTOBER 2012 – REVISED AUGUST 2014
DS125BR111 Low Power 12.5 Gbps 1-Lane Linear Repeater
with Equalization
1 Features
1 Low 65 mW/Channel (typ) Power Consumption
• Supports Link Training
• Supports Out-of-Band (OOB) Signaling
• Advanced Signal Conditioning I/O
– Receive CTLE up to 10 dB at 6 GHz
– Linear Output Driver
– Output Voltage Range over 1200 mV
• Programmable via Pin Selection, EEPROM, or
SMBus Interface
• Single Supply Voltage: 2.5 V or 3.3 V
40°C to 85°C Operating Temperature Range
• Flow-thru Pinout in 4 mm × 4 mm 24-pin Leadless
WQFN Package
2 Applications
• SAS-1/2/3 and SATA-1/2/3
• PCI Express 1/2/3
• Other Proprietary Interfaces up to 12.5 Gbps
3 Description
The DS125BR111 is an extremely low power high
performance repeater/redriver designed to support 1-
lane carrying high speed interface up to 12.5 Gbps.
The receiver's continuous time linear equalizer
(CTLE) provides a boost of 3-10 dB at 6 GHz in each
channel. When operating in SAS-3 or PCIe Gen-3
applications, the DS125BR111 preserves transmit
signal characteristics allowing the host controller and
the end point to negotiate transmit equalizer
coefficients. Transparency to the link training protocol
maximizes the flexibility of the physical placement of
the device within the interconnect and improves
overall channel performance.
The programmable settings can be applied easily via
pins, software (SMBus or I2C), or loaded via an
external EEPROM. In EEPROM mode, the
configuration information is automatically loaded on
power up, which eliminates the need for an external
microprocessor or software driver.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS125BR111
WQFN (24)
4.00mm x 4.00mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
Address
straps (pull-up
or pull-down)
VDD
2.5 V
Mode(4)
2.5V
10F 1F 0.1F
(1x) (1x) (2x)
OUTA+
OUTA-
DS125BR111
INA+
INA-
INB+
INB-
OUTB+
OUTB-
AD0/EQA0
AD1/EQA1
AD2/EQB1
AD3/EQB0
RES
SD_TH
ENSMB
VDD
SMBus
1 NŸ Slave
Mode(1)
3.3V
4.7 NŸ
4.7 NŸ
SDA/VODA_DB(2)
SCL/VODB_DB(2)
To system
SMBus
READEN/VOD_SEL
VIN
VDD_SEL
DONE/RXDET
PWDN(3)
VDD
(DAP) GND(5)
Normal
operation
(1) Schematic requires different connections for SMBus Master Mode and Pin Mode
(2) SMBus signals need to be pulled up elsewhere in the system
(3) PWDN pin can alternatively be driven by a control device (i.e. FPGA)
(4) Schematic requires different connections for 3.3 V mode
(5) A minimum of 4 vias are recommended for proper thermal and electrical performance
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

DS125BR111
DS125BR111
SNLS430C – OCTOBER 2012 – REVISED AUGUST 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 Handling Ratings....................................................... 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information .................................................. 6
7.5 Electrical Characteristics........................................... 7
7.6 Electrical Characteristics — Serial Management Bus
Interface .................................................................. 10
7.7 Timing Requirements .............................................. 10
7.8 Typical Characteristics ............................................ 12
8 Detailed Description ............................................ 13
8.1 Overview ................................................................. 13
8.2 Functional Block Diagram ....................................... 13
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 14
8.5 Programming .......................................................... 17
8.6 Register Maps ......................................................... 24
9 Application and Implementation ........................ 32
9.1 Application Information............................................ 32
9.2 Typical Application ................................................. 34
10 Power Supply Recommendations ..................... 36
11 Layout................................................................... 37
11.1 Layout Guidelines ................................................. 37
11.2 Layout Example .................................................... 37
12 Device and Documentation Support ................. 38
12.1 Trademarks ........................................................... 38
12.2 Electrostatic Discharge Caution ............................ 38
12.3 Glossary ................................................................ 38
13 Mechanical, Packaging, and Orderable
Information ........................................................... 38
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (July 2014) to Revision C
Page
• Changed data sheet flow and layout to conform with new TI standards. Added the following sections: Application
and Implementation; Power Supply Recommendations; Layout; Device and Documentation Support; Mechanical,
Packaging, and Ordering Information .................................................................................................................................... 1
Changes from Revision A (January 2014) to Revision B
Page
• Changed Features ................................................................................................................................................................. 1
Changes from Original (April 2013) to Revision A
Page
• Changed layout of National Data Sheet to TI format ............................................................................................................. 1
2 Submit Documentation Feedback
Copyright © 2012–2014, Texas Instruments Incorporated
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Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS125BR111 SNLS430C – OCTO BER 2012 – REVISED AUGUST 2014 DS125B R111 Low Power 12.5 Gbps 1-Lane Linear Repeater with Equalization 1 Features •1 Low 65 mW/Channel (typ) Power Cons umption • Supports Link Training • Supports Out-of-Band (OOB) Signaling Advanced Signal Conditioning I/O – Receive CTLE up to 10 dB at 6 GHz – L inear Output Driver – Output Voltage Range over 1200 mV • Programmable via Pin Selection, EEPROM, or SMBus Interf ace • Single Supply Voltage: 2.5 V or 3.3 V • −40°C to 85°C Operating Temperature Range • Flow-thru Pinout in 4 mm × 4 mm 24-pin Leadless WQFN Pa ckage 2 Applications • SAS-1/2/3 and SATA-1/2/3 • PCI Express 1/2/3 • Ot her Proprietary Interfaces up to 12.5 G bps 3 Description The DS125BR111 is an extremely low power high performance r epeater/redriver designed to support 1l ane carrying high speed interface up to 12.5 Gbps. The receiver's continuous time linear equalizer (.
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