SN74LVC138A Demultiplexers Datasheet

SN74LVC138A Datasheet, PDF, Equivalent


Part Number

SN74LVC138A

Description

3-Line to 8-Line Decoders Demultiplexers

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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SN74LVC138A
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SN54LVC138A, SN74LVC138A
SCAS291W – MARCH 1993 – REVISED OCTOBER 2016
SN74LVC138A 3-Line to 8-Line Decoders Demultiplexers
1 Features
1 Operate From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max tpd of 5.8 ns at 3.3 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
3 Description
The SN74LVC138A devices are designed for high-
performance memory-decoding or data-routing
applications requiring very short propagation delay
times. In high-performance memory systems, these
decoders minimize the effects of system decoding.
When employed with high-speed memories using a
fast enable circuit, delay times of these decoders and
the enable time of the memory usually are less than
the typical access time of the memory. This means
that the effective system delay introduced by the
decoders is negligible.
2 Applications
• LED Displays
• Servers
• White Goods
• Power Infrastructure
• Building Automation
• Factory Automation
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LCCC (20)
8.89 mm × 8.89 mm
CDIP (16)
19.56 mm × 6.92 mm
CFP (16)
10.30 mm × 6.73 mm
SOIC (16)
9.90 mm × 3.91 mm
SNx4LVC138A SSOP (16)
TVSOP (16)
6.20 mm × 5.30 mm
3.60 mm × 4.40 mm
BGA MICROSTAR
JUNIOR (20)
4.00 mm × 3.00 mm
TSSOP (16)
5.00 mm × 4.40 mm
UQFN (16)
2.60 mm × 1.80 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
1
A
Select
Inputs
2
B
3
C
6
G1
Enable
Inputs
4
G2A
5
G2B
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
15 Y0
14 Y1
13
Y2
12 Y3
11 Y4
Data
Outputs
10 Y5
9 Y6
7
Y7
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LVC138A
SN54LVC138A, SN74LVC138A
SCAS291W – MARCH 1993 – REVISED OCTOBER 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics........................................... 7
6.6 Switching Characteristics—SN54LVC138A .............. 7
6.7 Switching Characteristics—SN74LVC138A .............. 7
6.8 Operating Characteristics.......................................... 8
6.9 Typical Characteristics .............................................. 8
7 Parameter Measurement Information .................. 9
8 Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 11
9 Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application .................................................. 12
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 13
12 Device and Documentation Support ................. 14
12.1 Related Links ........................................................ 14
12.2 Receiving Notification of Documentation Updates 14
12.3 Community Resources.......................................... 14
12.4 Trademarks ........................................................... 14
12.5 Electrostatic Discharge Caution ............................ 14
12.6 Glossary ................................................................ 14
13 Mechanical, Packaging, and Orderable
Information ........................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision V (November 2013) to Revision W
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Deleted Ordering Information table; see Packaging Ordering Addendum at the end of the data sheet................................ 1
• Changed RθJA values from: 73 to 86.8 (D), 82 to 100.1 (DB), 120 to 122.1 (DGV), 78 to 84 (ZQN), 108 to 108.9
(PW) ....................................................................................................................................................................................... 6
• Deleted RθJA values for NS and RGY packages ..................................................................................................................... 6
Changes from Revision U (OCTOBER 2012) to Revision V
Page
• Updated document to new TI data sheet format - no specification changes. ........................................................................ 1
• Removed Ordering Information table ..................................................................................................................................... 1
• Added ESD warning ............................................................................................................................................................... 1
2 Submit Documentation Feedback
Copyright © 1993–2016, Texas Instruments Incorporated
Product Folder Links: SN54LVC138A SN74LVC138A


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LVC138A, SN74LVC138A SCA S291W – MARCH 1993 – REVISED OCTOBE R 2016 SN74LVC138A 3-Line to 8-Line Dec oders Demultiplexers 1 Features •1 O perate From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 5.8 ns at 3.3 V • Typical VOLP (Outp ut Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, T A = 25°C • Latch-Up Performance Exce eds 250 mA Per JESD 17 3 Description T he SN74LVC138A devices are designed for highperformance memory-decoding or dat a-routing applications requiring very s hort propagation delay times. In high-p erformance memory systems, these decode rs minimize the effects of system decod ing. When employed with high-speed memo ries using a fast enable circuit, delay times of these decoders and the enable time of the memory usually are less th an the typical access time of the memory. This means that the effective system de.
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