74CBTLV3384 SWITCH Datasheet

74CBTLV3384 Datasheet, PDF, Equivalent


Part Number

74CBTLV3384

Description

LOW-VOLTAGE 10-BIT BUS SWITCH

Manufacture

Renesas

Total Page 6 Pages
Datasheet
Download 74CBTLV3384 Datasheet


74CBTLV3384
74CBTLV3384
LOW-VOLTAGE 10-BIT BUS SWITCH
LOW-VOLTAGE 10-BIT
BUS SWITCH
INDUSTRIALTEMPERATURERANGE
74CBTLV3384
FEATURES:
• 5Ω A/B bi-directional bus switch
• Isolation under power-off conditions
• Over-voltage tolerant
• Latch-up performance exceeds 100mA
• VCC = 2.3V - 3.6V, Normal Range
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in QSOP and TSSOP packages
APPLICATIONS:
• 3.3V High Speed Bus Switching and Bus Isolation
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The CBTLV3384 is a ten bit high-speed bus switch with low on-state
resistance of the switch allowing connections to be made with minimal
propagation delay.
The device is organized as dual 5-bit bus switches with separate output-
enable (OE) inputs, to allow use as two 5-bit bus switches or one 10-bit bus
switch. When OE is low, the associated 5-bit bus switch is on and A port is
connected to B port. When OE is high, the switch is open, and a high-
impedance state exists between the two ports.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
SIMPLIFIED SCHEMATIC, EACH SWITCH
3
1A1
2
SW 1B1
11
1A5
1OE
1
10
SW 1B5
A
B
2A1 14
2A5 22
2OE 13
15
SW 2B1
10
SW 2B5
OE
INDUSTRIAL TEMPERATURE RANGE
© 2019 Integrated Device Technology, Inc.
1
MAY 2019
DSC-5742/7

74CBTLV3384
74CBTLV3384
LOW-VOLTAGE 10-BIT BUS SWITCH
PIN CONFIGURATION
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1B5
1A5
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Package Type
TSSOP
QSOP
TOP VIEW
Package Code
PGG24
PCG24
VCC
2B5
2A5
2A4
2B4
2B3
2A3
2A2
2B2
2B1
2A1
2OE
Order Code
PGG
QG
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
VCC SupplyVoltage Range
–0.5 to +4.6
VI Input Voltage Range
–0.5 to +4.6
Continuous Channel Current
128
IIK Input Clamp Current, VI/O < 0
–50
TSTG Storage Temperature
–65 to +150
Unit
V
V
mA
mA
°C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
FUNCTION TABLE(1)
Input
1OE 2OE
LL
LH
HL
HH
Inputs/Outputs
1B1 - 1B5
2B1 - 2B5
1A1 - 1A5
2A1 - 2A5
1A1 - 1A5
Z
Z 2A1 - 2A5
ZZ
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
OPERATING CHARACTERISTICS, TA = 25°C(1)
Symbol
VCC
VIH
Parameter
Supply Voltage
High-Level Control Input Voltage
VIL Low-Level Control Input Voltage
TA OperatingFree-AirTemperature
Test Conditions
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
NOTE:
1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Min.
2.3
1.7
2
40
Max. Unit
3.6 V
—V
0.7 V
0.8
85 °C
2


Features 74CBTLV3384 LOW-VOLTAGE 10-BIT BUS SWITC H LOW-VOLTAGE 10-BIT BUS SWITCH INDUS TRIALTEMPERATURERANGE 74CBTLV3384 FEAT URES: • 5Ω A/B bi-directional bus sw itch • Isolation under power-off cond itions • Over-voltage tolerant • La tch-up performance exceeds 100mA • VC C = 2.3V - 3.6V, Normal Range • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Available in QSOP and TSSOP pa ckages APPLICATIONS: • 3.3V High Spee d Bus Switching and Bus Isolation FUNCT IONAL BLOCK DIAGRAM DESCRIPTION: The C BTLV3384 is a ten bit high-speed bus sw itch with low on-state resistance of th e switch allowing connections to be mad e with minimal propagation delay. The d evice is organized as dual 5-bit bus sw itches with separate outputenable (OE) inputs, to allow use as two 5-bit bus s witches or one 10-bit bus switch. When OE is low, the associated 5-bit bus swi tch is on and A port is connected to B port. When OE is high, the switch is open, and a highimpedance state exists betw.
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