IDT74ALVCHR162245 TRANSCIEVER Datasheet

IDT74ALVCHR162245 Datasheet, PDF, Equivalent


Part Number

IDT74ALVCHR162245

Description

3.3V CMOS 16-BIT BUS TRANSCIEVER

Manufacture

Renesas

Total Page 7 Pages
Datasheet
Download IDT74ALVCHR162245 Datasheet


IDT74ALVCHR162245
IDT74ALVCHR162245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
3.3V CMOS 16-BIT
BUS TRANSCIEVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCHR162245
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP package
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low Switching Noise
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCHR162245 device is designed for asynchronous
communication between data buses. The control-function implementation
minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit
transceiver. It allows data transmission from the A bus to the B bus or from
the B bus to the A bus, depending on the logic level at the direction control
(DIR) input. The output-enable (OE) input can be used to disable the device
so that the buses are effectively isolated.
The ALVCHR162245 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold levels.
The ALVCHR162245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1DIR 1
1A1 47
1A2 46
1A3 44
1A4 43
1A5 41
1A6 40
1A7 38
1A8 37
48 1OE
2 1B1
3 1B2
5 1B3
6 1B4
8 1B5
9 1B6
11 1B7
12 1B8
2DIR 24
2A1 36
2A2 35
2A3 33
2A4 32
2A5 30
2A6 29
2A7 27
2A8 26
25 2OE
13 2B1
14 2B2
16 2B3
17 2B4
19 2B5
20 2B6
22 2B7
23 2B8
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2016 Integrated Device Technology, Inc.
1
SEPTEMBER 2016
DSC-4606/6

IDT74ALVCHR162245
IDT74ALVCHR162245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 1OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 VCC
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 VCC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max Unit
VTERM(2)
VTERM(3)
TSTG
IOUT
IIK
IOK
ICC
ISS
Terminal Voltage with Respect to GND –0.5 to +4.6
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
Storage Temperature
–65 to +150
DC Output Current
–50 to +50
Continuous Clamp Current,
VI < 0 or VI > VCC
±50
Continuous Clamp Current, VO < 0
–50
Continuous Current through each
VCC or GND
±100
V
V
°C
mA
mA
mA
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max.
CIN
COUT
Input Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
5
7
7
9
CI/O I/O Port Capacitance VIN = 0V 7 9
NOTE:
1. As applicable to the device type.
Unit
pF
pF
pF
PIN DESCRIPTION
Pin Names
xOE
DIR
Description
Output Enable Inputs (Active LOW)
Direction Control Inputs
xAx(1)
Side A Inputs or 3-State Outputs
xBx(1)
Side B Inputs or 3-State Outputs
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
TSSOP
TOP VIEW
FUNCTION TABLE (EACH 8-BIT SECTION)(1)
Inputs
xOE xDIR
Outputs
L L Bus B data to A bus
L H Bus A data to B bus
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
X
High Z State
2


Features IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS T RANSCEIVER WITH 3-STATE OUTPUTS 3.3V CM OS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPER ATURE RANGE IDT74ALVCHR162245 FEATURES : • 0.5 MICRON CMOS Technology • Ty pical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 301 5; > 200V using machine model (C = 200p F, R = 0) • VCC = 3.3V ± 0.3V, Norma l Range • VCC = 2.7V to 3.6V, Extende d Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ. static) • Rail-to-Rail output swing for increase d noise margin • Available in TSSOP p ackage DRIVE FEATURES: • Balanced Out put Drivers: ±12mA • Low Switching N oise APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage comp uting systems DESCRIPTION: This 16-bit bus transceiver is built using advance d dual metal CMOS technology. The ALVCH R162245 device is designed for asynchro nous communication between data buses. The control-function implementation minimizes external timing requirements. This device can b.
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