33889 chip Datasheet

33889 Datasheet, PDF, Equivalent


Part Number

33889

Description

System basis chip

Manufacture

NXP

Total Page 30 Pages
Datasheet
Download 33889 Datasheet


33889
NXP Semiconductors
Technical Data
System basis chip (SBC) with low
speed fault tolerant CAN interface
Document Number: MC33889
Rev. 15.0, 8/2016
33889
The 33889 is an SBC having a fully protected, fixed 5.0 V low drop-out
regulator, with current limit, overtemperature prewarning and reset. An SBC
device is a monolithic IC combining many functions repeatedly found in
standard microcontroller-based systems, e.g., protection, diagnostics,
communication, power, etc.
An output drive with sense input is also provided to implement a second 5.0 V
regulator using an external PNP. The 33889 has Normal, Standby, Stop and
Sleep modes; an internally switched high-side power supply output with two
wake-up inputs; programmable timeout or window watchdog, Interrupt, Reset,
serial peripheral interface (SPI) input control, and a low-speed fault tolerant
CAN transceiver, compatible with CAN 2.0 A and B protocols for module-to-
module communications. The combination is an economical solution for power
management, high-speed communication, and control in MCU-based systems.
This device is powered by SMARTMOS technology.
Features
• VDD1: 5.0 V low drop voltage regulator, current limitation, overtemperature
detection, monitoring and reset function with total current capability 200 mA
• V2: tracking function of VDD1 regulator; control circuitry for external bipolar
ballast transistor for high flexibility in choice of peripheral voltage and current
supply
• Four operational modes
• Low standby current consumption in Stop and Sleep modes
• Built-in low speed 125 kbps fault tolerant CAN physical interface.
• External high voltage wake-up input, associated with HS1 VBAT switch
• 150 mA output current capability for HS1 VBAT switch allowing drive of
external switches pull-up resistors or relays
SYSTEM BASIS CHIP
EG SUFFIX (PB-FREE)
PLASTIC PACKAGE
98ASB42345B
28-PIN SOICW
ORDERING INFORMATION
Device
(Add R2 Suffix for
Tape and Reel)
Temperature
Range (TA)
Package
MC33889BPEG
*MC33889DPEG
-40 to 125 °C
*Recommended for new designs
28 SOICW
VPWR
33889
5.0 V
VDD1
VSUP
V2
MCU
GND
RST
INT
V2CTRL
V2
HS1
Local Module Supply
CS
SCLK
MOSI
MISO
CS
SPI
SCLK
MOSI
MISO
L0
L1
WDOG
RTH
Wake-Up Inputs
Safe Circuits
TXD CANH
RXD CANL
RTL
Twisted
CAN Bus
Pair
Figure 1. 33889 simplified application diagram
© 2016 NXP B.V.

33889
1 Device variations
Table 1. Device variations between the 33889D and 33889B versions (1)
Parameters
Symbol
Trait
Device part number
MC33889B(2)
MC33889D(2)
Differential Receiver, Recessive To Dominant Threshold (By
Definition, VDIFF = VCANH-VCANL)
VDIFF1
Min.
Typ
Max.
3.2 V
2.6 V
2.1 V
3.5 V
3.0 V
2.5 V
Differential Receiver, Dominant To Recessive Threshold (Bus
Failures 1, 2, 5)
VDIFF2
Min.
Typ
Max.
3.2 V
2.6 V
2.1 V
3.5 V
3.0 V
2.5 V
Min. 50 mA
50 mA
CANH Output Current (VCANH = 0; TX = 0.0)
ICANH
Typ
Max.
75 mA
110 mA
100 mA
130 mA
Min. 50 mA
50 mA
CANL Output Current (VCANL = 14 V; TX = 0.0)
ICANL
Typ
Max.
90 mA
135 mA
140 mA
170 mA
Detection threshold for Short circuit to Battery voltage
Vcanh
Max.
Vsup/2 + 5V
Vsup/2 + 4.55V
loop time Tx to Rx, no bus failure, ISO configuration
tLOOPRD
Max.
N/A
1.5us
loop time Tx to Rx, with bus failure, ISO configuration
tLOOPRD-F
Max.
N/A
1.9us
loop time Tx to Rx, with bus failure and +-1.5V gnd shift,
5 node network, ISO configuration
tLOOPRD/DR-F+GS
N/A 3.6us
Minimum Dominant time for Wake up on CANL or CANH (Tem
Vbat mode)
tWAKE
Min.
typ
Max.
N/A
30
N/A
8
16
30
T2SPI timing
T2spi
Min.
not specified, 25us spec
applied
25us
Device behavior
CANH or CANL open wire recovery principle
Reference MC33889B on page 32
after 4 non consecutive
pulses
after 4 consecutive pulses
Rx behavior in TermVbat mode
Reference MC333889D on page 32
Rx recessive, no pulse
Rx recessive, dominant
pulse to signal bus traffic
Notes
1. This datasheet uses the term 33889 in the inclusive sense, referring to both the D version (33889D) and the B version (33689B).
2. The 33889D and 33889B versions are nearly identical. However, where variations in characteristic occur, these items will be separated onto
individual lines.
33889
2
NXP Semiconductors


Features NXP Semiconductors Technical Data System basis chip (SBC) with low speed fault tolerant CAN interface Document Number : MC33889 Rev. 15.0, 8/2016 33889 The 33889 is an SBC having a fully protecte d, fixed 5.0 V low drop-out regulator, with current limit, overtemperature pre warning and reset. An SBC device is a m onolithic IC combining many functions r epeatedly found in standard microcontro ller-based systems, e.g., protection, d iagnostics, communication, power, etc. An output drive with sense input is als o provided to implement a second 5.0 V regulator using an external PNP. The 33 889 has Normal, Standby, Stop and Sleep modes; an internally switched high-sid e power supply output with two wake-up inputs; programmable timeout or window watchdog, Interrupt, Reset, serial peri pheral interface (SPI) input control, a nd a low-speed fault tolerant CAN trans ceiver, compatible with CAN 2.0 A and B protocols for module-tomodule communic ations. The combination is an economical solution for power man.
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