SN74LVC2G02-EP Gate Datasheet

SN74LVC2G02-EP Datasheet, PDF, Equivalent


Part Number

SN74LVC2G02-EP

Description

Dual 2-Input Positive-NOR Gate

Manufacture

etcTI

Total Page 10 Pages
Datasheet
Download SN74LVC2G02-EP Datasheet


SN74LVC2G02-EP
www.ti.com
SN74LVC2G02-EP
DUAL 2-INPUT POSITIVE-NOR GATE
SGDS034A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
FEATURES
1
Controlled Baseline
– One Assembly Site
– One Test Site
– One Fabrication Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Enhanced Product Change Notification
Qualification Pedigree (1)
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 5.9 ns at 3.3 V
Low Power Consumption, 10 μA Max ICC
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
±24 mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
DCU PACKAGE
(TOP VIEW)
1A
1B
2Y
GND
1
2
3
4
8
7
6
5
VCC
1Y
2B
2A
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G02 performs the Boolean function Y = A + B or Y = A • B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–55°C to 125°C VSSOP – DCU
ORDERING INFORMATION(1)
PACKAGE (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Reel of 3000 SN74LVC2G02MDCUREP
SBMM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated

SN74LVC2G02-EP
SN74LVC2G02-EP
DUAL 2-INPUT POSITIVE-NOR GATE
SGDS034A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
FUNCTION TABLE
(EACH GATE)
INPUTS
AB
HX
XH
LL
OUTPUT
Y
L
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
1A
2
1B
7
1Y
5
2A
6
2B
3
2Y
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VCC Supply voltage range
VI Input voltage range(2)
VO Voltage range applied to any output in the high-impedance or power-off state(2)
VO Voltage range applied to any output in the high or low state(2)(3)
IIK Input clamp current
VI < 0
IOK Output clamp current
VO < 0
IO Continuous output current
Continuous current through VCC or GND
θJA Package thermal impedance(4)
Tstg Storage temperature range
MIN
–0.5
–0.5
–0.5
–0.5
–65
MAX
6.5
6.5
6.5
VCC + 0.5
–50
–50
±50
±100
227
150
UNIT
V
V
V
V
mA
mA
mA
mA
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2 Submit Documentation Feedback
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G02-EP


Features www.ti.com SN74LVC2G02-EP DUAL 2-INPUT POSITIVE-NOR GATE SGDS034A – SEPTEMBE R 2007 – REVISED SEPTEMBER 2007 FEAT URES 1 • Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site • Extended Temperat ure Performance of –55°C to 125°C Enhanced Diminishing Manufacturing S ources (DMS) Support • Enhanced Produ ct Change Notification • Qualificatio n Pedigree (1) • Supports 5-V VCC Ope ration • Inputs Accept Voltages to 5. 5 V • Max tpd of 5.9 ns at 3.3 V • Low Power Consumption, 10 μA Max ICC ( 1) Component qualification in accordanc e with JEDEC and industry standards to ensure reliable operation over an exten ded temperature range. This includes, b ut is not limited to, Highly Accelerate d Stress Test (HAST) or biased 85/85, t emperature cycle, autoclave or unbiased HAST, electromigration, bond intermeta llic life, and mold compound life. Such qualification testing should not be vi ewed as justifying use of this component beyond specified performance and environmental limits. .
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