SN74LVC2G157 multiplexer Datasheet

SN74LVC2G157 Datasheet, PDF, Equivalent


Part Number

SN74LVC2G157

Description

Single 2-Line to 1-Line data selector multiplexer

Manufacture

etcTI

Total Page 26 Pages
Datasheet
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SN74LVC2G157
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SN74LVC2G157
SCES207N – APRIL 1999 – REVISED MARCH 2019
SN74LVC2G157 Single 2-Line to 1-Line data selector multiplexer
1 Features
1 Available in the Texas Instruments
NanoFree™ package
• Supports 5-V VCC operation
• Inputs accept voltages to 5.5 V
• Max tpd of 6 ns at 3.3 V
• Low power consumption, 10-µA Maximum ICC
• ±24-mA Output drive at 3.3 V
• Typical VOLP (Output ground bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
• Ioff Supports live insertion, partial-power-down
mode, and back-drive protection
• Can be used as a down translator to translate
inputs from a maximum of 5.5 V down
to the VCC Level
• Latch-up performance exceeds 100 mA per
JESD 78, Class II
• ESD Protection exceeds JESD 22
– 2000-V Human body model (A114-A)
– 1000-V Charged-device model (C101)
3 Description
This single 2-line to 1-line data selector multiplexer is
designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G157 device features a common
strobe (G) input. When the strobe is high, Y is low
and Y is high. When the strobe is low, a single bit is
selected from one of two sources and is routed to the
outputs. The device provides true and complementary
data.
NanoFree™ package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74LVC2G157DCT SSOP (8)
2.95 mm × 2.80 mm
SN74LVC2G157DCU VSSOP (8)
2.30 mm × 2.00 mm
SN74LVC2G157YZP DSBGA (8)
1.91 mm × 0.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
• Barcode scanner
• Cable solutions
• E-books
• Embedded PC
• Field transmitter: temperature or pressure sensors
• Fingerprint biometrics
• HVAC: Heating, ventilating, and air conditioning
• Network-attached storage (NAS)
• Server motherboard and PSU
• Software defined radio (SDR)
• TV: High definition (HDTV), LCD, and digital
• Video communications systems
• Wireless data access cards, headsets, keyboards,
mice, and LAN cards
1
A
2
B
G7
6
A/B
Logic Diagram (Positive Logic)
5
Y
3
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LVC2G157
SN74LVC2G157
SCES207N – APRIL 1999 – REVISED MARCH 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions ...................... 4
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics .......................................... 5
6.6 Switching Characteristics ......................................... 6
6.7 Operating Characteristics.......................................... 6
6.8 Typical Characteristics .............................................. 6
7 Parameter Measurement Information .................. 7
8 Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 9
9 Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 12
11 Layout................................................................... 12
11.1 Layout Guidelines ................................................. 12
11.2 Layout Example .................................................... 13
12 Device and Documentation Support ................. 14
12.1 Documentation Support ........................................ 14
12.2 Community Resources.......................................... 14
12.3 Trademarks ........................................................... 14
12.4 Electrostatic Discharge Caution ............................ 14
12.5 Glossary ................................................................ 14
13 Mechanical, Packaging, and Orderable
Information ........................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision M (June 2015) to Revision N
Page
• Changed YZP package pinout drawing to match mechanical data drawing; and, pin functions description for clarity ........ 3
• Added additional thermal metrics for all packages................................................................................................................. 5
• Added detailed feature description sections for Standard CMOS Inputs, Balanced High-Drive CMOS Push-Pull
Outputs, and Negative Clamping Diodes. .............................................................................................................................. 8
• Added improved Design Requirements and Detailed Design Procedure............................................................................. 10
• Changed verbiage to better reflect recommendations for this specific device rather than logic devices in general............ 12
• Added layout example for the YZP package. ....................................................................................................................... 12
Changes from Revision L (January 2014) to Revision M
Page
• Added ESD Ratings table....................................................................................................................................................... 4
• Added Thermal Information table. .......................................................................................................................................... 5
• Added Typical Characteristics ................................................................................................................................................ 6
• Added Mechanical, Packaging, and Orderable Information section..................................................................................... 14
Changes from Revision K (January 2007) to Revision L
Page
• Updated document to new TI data sheet format. ................................................................................................................... 1
• Removed Ordering Information table ..................................................................................................................................... 1
• Updated Features ................................................................................................................................................................... 1
• Added Device Information table ............................................................................................................................................. 1
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Copyright © 1999–2019, Texas Instruments Incorporated
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Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity Reference Design SN74LVC2G157 SCES207N – APRIL 1999 – REVISED MAR CH 2019 SN74LVC2G157 Single 2-Line to 1 -Line data selector multiplexer 1 Feat ures •1 Available in the Texas Instru ments NanoFree™ package • Supports 5-V VCC operation • Inputs accept vol tages to 5.5 V • Max tpd of 6 ns at 3 .3 V • Low power consumption, 10-µA Maximum ICC • ±24-mA Output drive at 3.3 V • Typical VOLP (Output ground bounce) <0.8 V at VCC = 3.3 V, TA = 25 C • Typical VOHV (Output VOH undersh oot) >2 V at VCC = 3.3 V, TA = 25°C Ioff Supports live insertion, partial -power-down mode, and back-drive protec tion • Can be used as a down translat or to translate inputs from a maximum o f 5.5 V down to the VCC Level • Latch -up performance exceeds 100 mA per JESD 78, Class II • ESD Protection exceed s JESD 22 – 2000-V Human body model ( A114-A) – 1000-V Charged-device model (C101) 3 Description This single 2-line to 1-line data selec.
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