SN74LVC1G32-EP Gate Datasheet

SN74LVC1G32-EP Datasheet, PDF, Equivalent


Part Number

SN74LVC1G32-EP

Description

Single 2-Input Positive-OR Gate

Manufacture

etcTI

Total Page 16 Pages
Datasheet
Download SN74LVC1G32-EP Datasheet


SN74LVC1G32-EP
www.ti.com
FEATURES
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 3.6 ns at 3.3 V
Low Power Consumption, 10 μA Max ICC
• ±24-mA Output Drive at 3.3 V
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74LVC1G32-EP
SINGLE 2-INPUT POSITIVE-OR GATE
SCES458D – DECEMBER 2003 – REVISED JUNE 2007
Ioff Supports Partial Power Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DBV OR DCK PACKAGE
(TOP VIEW)
A
B
GND
1
2
3
5 VCC
4Y
DESCRIPTION/ORDERING INFORMATION
This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G32 performs the Boolean function Y + A ) B or Y + A B in positive logic.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–40°C to 85°C
–55°C to 125°C
ORDERING INFORMATION(1)
PACKAGE (2)
ORDERABLE PART NUMBER
SOT (SC-70) – DCK Reel of 3000
SN74LVC1G32IDCKREP
SOT (SC-70) – DCK Reel of 3000
SN74LVC1G32MDCKREP
SOP (SOT-23) – DBV Reel of 3000
SN74LVC1G32MDBVREP
TOP-SIDE MARKING(3)
CG0
BYB
SBGM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(3) The actual top-side making has one additional character that designates the wafer fab/assembly site.
FUNCTION TABLE
INPUTS
AB
HX
XH
LL
OUTPUT
Y
H
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2007, Texas Instruments Incorporated

SN74LVC1G32-EP
SN74LVC1G32-EP
SINGLE 2-INPUT POSITIVE-OR GATE
SCES458D – DECEMBER 2003 – REVISED JUNE 2007
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
2
B
4
Y
www.ti.com
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC Supply voltage range
VI Input voltage range(2)
VO Voltage range applied to any output in the high-impedance or power-off state(2)
VO Voltage range applied to any output in the high or low state(2)(3)
IIK Input clamp current
VI < 0
IOK Output clamp current
VO < 0
IO Continuous output current
Continuous current through VCC or GND
θJA Package thermal impedance(4)
DBV package
DCK package
Tstg Storage temperature range
MIN MAX UNIT
–0.5 6.5 V
–0.5 6.5 V
–0.5 6.5 V
–0.5
VCC + 0.5
–50
V
mA
–50 mA
±50 mA
±100 mA
324.1
°C/W
252
–65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2 Submit Documentation Feedback


Features www.ti.com FEATURES • Controlled Basel ine – One Assembly/Test Site, One Fab rication Site • Extended Temperature Performance of –55°C to 125°C • E nhanced Diminishing Manufacturing Sourc es (DMS) Support • Enhanced Product-C hange Notification • Qualification Pe digree (1) • Supports 5-V VCC Operati on • Inputs Accept Voltages to 5.5 V • Max tpd of 3.6 ns at 3.3 V • Low Power Consumption, 10 μA Max ICC • 24-mA Output Drive at 3.3 V (1) Compon ent qualification in accordance with JE DEC and industry standards to ensure re liable operation over an extended tempe rature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperatur e cycle, autoclave or unbiased HAST, el ectromigration, bond intermetallic life , and mold compound life. Such qualific ation testing should not be viewed as j ustifying use of this component beyond specified performance and environmental limits. SN74LVC1G32-EP SINGLE 2-INPUT POSITIVE-OR GATE SCES458D – DECEMBER 2003 – REVISED.
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