SN10KHT5574 OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE EDGEĆTRIGGERED FLIPĆFLOPS AND 3ĆSTATE OUTPUTS
SDZS010 − JANUARY 1990 − REVISED OCTOBER 1990
10KH Compatible
DW OR NT PACKAGE (TOP VIEW)
ECL Clock and TTL Control Inputs
Flow-Through Architecture Optimizes PCB
Layout
Center Pin VCC, VEE, and GND
Configurations Minimize High-Speed Switching Noise
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