SN54LV00A Positive-NAND Gates Datasheet

SN54LV00A Datasheet, PDF, Equivalent


Part Number

SN54LV00A

Description

Quadruple 2-Input Positive-NAND Gates

Manufacture

etcTI

Total Page 27 Pages
Datasheet
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SN54LV00A
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SN54LV00A, SN74LV00A
SCLS389K – SEPTEMBER 1997 – REVISED FEBRUARY 2015
Quadruple 2-Input Positive-NAND Gates
1 Features
1 2-V to 5.5-V VCC Operation
• Max tpd of 6.5 ns at 5 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on
All Ports
• Ioff Supports Live Insertion, Partial Power Down
Mode, and Back Drive Protection
• Latch-Up Performance Exceeds 250 mA
Per JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model
– 200-V Machine Model
– 1000-V Charged-Device Model
2 Applications
• Power Infrastructure
• Network Switch
• Automotive Infotainment
• Servers
3 Description
These quadruple 2-input positive-NAND gates are
designed for 2-V to 5.5-V VCC operation.
The SNx4LV00A devices perform the boolean
function Y = A B or Y = A + B in positive logic.
PART NUMBER
SNx4LV00A
Device Information(1)
PACKAGE
BODY SIZE (NOM)
VQFN (14)
3.50 mm x 3.50 mm
SOIC (14)
8.65 mm × 3.91 mm
SOP (14)
10.30 mm x 5.30 mm
SSOP (14)
6.20 mm x 5.30 mm
TSSOP (14)
5.00 mm x 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN54LV00A
SN54LV00A, SN74LV00A
SCLS389K – SEPTEMBER 1997 – REVISED FEBRUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V ........ 6
7.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V ........ 6
7.8 Switching Characteristics, VCC = 5 V ± 0.5 V ........... 6
7.9 Noise Characteristics ................................................ 7
7.10 Operating Characteristics........................................ 7
7.11 Typical Characteristics ............................................ 7
8 Parameter Measurement Information .................. 8
9 Detailed Description .............................................. 9
9.1 Overview ................................................................... 9
9.2 Functional Block Diagram ......................................... 9
9.3 Feature Description................................................... 9
9.4 Device Functional Modes.......................................... 9
10 Application and Implementation........................ 10
10.1 Application Information.......................................... 10
10.2 Typical Application ............................................... 10
11 Power Supply Recommendations ..................... 11
12 Layout................................................................... 11
12.1 Layout Guidelines ................................................. 11
12.2 Layout Example .................................................... 11
13 Device and Documentation Support ................. 12
13.1 Related Links ........................................................ 12
13.2 Trademarks ........................................................... 12
13.3 Electrostatic Discharge Caution ............................ 12
13.4 Glossary ................................................................ 12
14 Mechanical, Packaging, and Orderable
Information ........................................................... 12
5 Revision History
Changes from Revision J (April 2005) to Revision K
Page
• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
2 Submit Documentation Feedback
Copyright © 1997–2015, Texas Instruments Incorporated
Product Folder Links: SN54LV00A SN74LV00A


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LV00A, SN74LV00A SCLS389 K – SEPTEMBER 1997 – REVISED FEBRUA RY 2015 Quadruple 2-Input Positive-NAND Gates 1 Features •1 2-V to 5.5-V VC C Operation • Max tpd of 6.5 ns at 5 V • Typical VOLP (Output Ground Bounc e) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C • Support Mixed-Mode Voltage Operation o n All Ports • Ioff Supports Live Inse rtion, Partial Power Down Mode, and Bac k Drive Protection • Latch-Up Perform ance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model – 200-V Machine Mode l – 1000-V Charged-Device Model 2 Ap plications • Power Infrastructure • Network Switch • Automotive Infotain ment • Servers 3 Description These q uadruple 2-input positive-NAND gates ar e designed for 2-V to 5.5-V VCC operati on. The SNx4LV00A devices perform the boolean function Y = A ● B or Y = A + B in positive logic. P.
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