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CD54HCT4017

DECADE COUNTER/DIVIDER

Description

D 4.5-V to 5.5-V Operation D Fully Static Operation D Buffered Inputs D Common Reset D Positive-Edge Clocking D Balanced Propagation Delay and Transition Times D Direct LSTTL Input Logic Compatibility – VIL = 0.8 V Maximum; VIH = 2 V Minimum D CMOS Input Compatibility – II ≤ 1 µA at VOL, VOH D Packaged in Ceramic (F) DIP Packages and Also Available in Chip F...

Texas Instruments

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